RE: PI BridgeSwitch roadtest preview – Design a good PCB heat flow using FEM approach

jc2048 — Sat, 18 Dec 2021 11:35:46 GMT

The FEMM software is very interesting, but I can't get the hang of the user interface. It's a bit painful to use.

Thinking a bit more about your simulation here.

Your temperature values need to be absolute (K rather than C). You've put 60 for the boundary, but that's 60K, not the 60C you were probably intending.

Air is a fairly poor conductor of heat, so at equilibrium the temperature drop is mostly across the air to the boundary, and the temperature drop across the board all fits into one band. I would think that if you brought the boundary in to the edge of the board, you'd then see better the distribution of heat within the copper areas. But that doesn't really tell you what the temperatures on the board will be because the main mechanisms for heat transfer won't be conduction to the board edge, but rather convection air currents lifting heat away from the surface closer to the chips and radiation from those surfaces (in the dimension you aren't simulating).

If you want a model for thinking about what you have at the moment, imagine your board packed in a low-density closed-cell foam. The board surround is still mostly air, with a conduction figure similar to what you have in the simulation, but the board is going to sit there and cook in its own heat.

The FEMM software does appear to have some settings for convection and radiation, but I think that might just be at the boundary (I'm not sure - the UI is so frustrating it's very difficult to experiment with it). If so, you might be able to model a 2D slice through the board to see how heat behaves around one of the chips on a board, and how it moves off the top and bottom surfaces.

RE: PI BridgeSwitch roadtest preview – Design a good PCB heat flow using FEM approach

jc2048 — Wed, 15 Dec 2021 23:45:30 GMT

A couple of documents that might be of interest.

https://www.ti.com/lit/ds/symlink/lm117.pdf

This is an old voltage regulator datasheet from what was once National Semiconductor. If you look at page 29 onwards, it presents the practical results of heatsinking with copper on single and double-sided boards in various arrangements. The slight surprise is how little extra benefit comes from having an area of more than a square inch. That's because of how thin the foil is and the reluctance of the heat to move along it, preferring instead to heat the air around the chip or the resin under it.

https://www.renesas.com/us/en/document/oth/tb379-thermal-characterization-packaged-semiconductor-devices

This one from Renesas is about thermal specifications, but if you look at page 10 it describes the effect of having planes within the board and the way they spread the heat. That shows that there's a lot of benefit from the way they spread the heat evenly within the board.

I can't see 2D modeling of copper areas showing you either of those effects. I would think that thermal modeling in a high end PCB package would have to be full 3D, though personally I don't have any experience of doing this with software. For the stuff I worked on, we did the thermal side by building prototypes and measuring with thermocouples, and looking to see it reached a thermal equilibrium, at a sensible temperature above ambient, with reasonable junction temperatures.