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The issue at hand: Infineon selected the worst-case scenario for the DC-link capacitor based on the board specs and that is why it is 1000uF. Based on your application, there is a very high probability that a smaller cap can be used in place of the 1000uF. To calculate the cap value required, refer to the app note http://www.infineon.com/dgdl/Infineon-NovalithIC_BTN89x0-x2-AN-v00_03-EN.pdf?fileId=db3a30433fa9412f013fc8d88e3d430a&ack… section 4.2 starting on page 10. Equation that you need to work with is eqn 10 on page 12 (of the app note).
C4, so called DC-link capacitor: This electrolytic capacitor is required to keep the voltage ripple at the Vs- 9 pin of the NovalithIC low during switching operation (the applied measurement procedure for the 10 supply voltage is described in Chapter 3.1 of the Application Note). It is strongly recommended that the voltage ripple at the NovalithIC Vs-pin to the GND-pin is kept below 1 V peak to peak. The value of C4 must be aligned accordingly. See therefore Equation (10) in the Application Note. Most electrolytic capacitors are less effective at cold temperatures. It must be assured that C4 is also effective under the worst case conditions of the application. The layout is very important too. As shown in Figure 6, the capacitor C4 must be positioned with very short wiring close to the NovalithIC. This must be done to keep the parasitic inductors of the PCB-wires as small as possible.
==> the user manual refers to Chapter 3.1 but it is in section 4.2. Infineon needs to update their errata sheet!
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I'm looking at the really useful tool that should have element14 and a QR code on it ..
element14Dave
I've modded mine to make it easier to stack it, by using a coaxial cap and stacking headers: