Summer of FPGAs: MAX77714 Multichannel PMIC EVM - Review

Table of contents

RoadTest: Summer of FPGAs: MAX77714 Multichannel PMIC EVM

Author: scottiebabe

Creation date:

Evaluation Type: Development Boards & Tools

Did you receive all parts the manufacturer stated would be included in the package?: True

What other parts do you consider comparable to this product?:

What were the biggest problems encountered?: The 32K crystal oscillator did not run and the push buttons did not function.

Detailed Review:

The EVK includes a number of programable current sources and switched resistive loads on board. This allows you to evaluate MAX77714 PMIC with no more than a basic power supply and multimeter in conjunction with the EVK's desktop software.


Net names:

SD3 - BUCK3 Output.

VIL_SD3 - Output of the current shunt amplifier for Buck3's programable current sink.


BUCK 3 - Configuration

Buck 3 is left in its default configuration for a 900 mV output.

(BUCK3) SD3 - 0 A to 1 A

(BUCK3) SD3 - 100 mA to 1 A

(BUCK3) SD3 - Random 0 mA to 2.2 A



For this test we will evaluate how well LDO2 can post regulate the output of BUCK 3. First, we must remove R6 from the EVK:

Connect the output of BUCK 3 to in the input of LDO2:

BUCK 3 is configured to output 3.3V:

LDO2 is configured to output 2.5V:

To give LDO2 a fair chance, I will add a 1 mA static load with the unused programable current sink on the EVK:


LDO2 PSRR with a 1 mA Load


LDO2 PSRR with a 33 Ohm load

Enable the onboard 33 ohm load resistor in the EVK's GUI:


I was using the alligator ground clips of my scope probes in 1x mode for convenience. If one were to employ alternate probing techniques with a smaller loop-area, the results of the MAX77714 would likely exceed what was demonstrated in this blog post.


Clarification on the EVK's LDO Loads

The EVK includes a diverse set of discrete switchable loads on board:

One should note that the loads are being high side switched with an NFET. The gate drive signal for each of the NFETs originates from a I2C GPIO expander with its outputs referenced to VLOGIC.

When VLOGIC is set for 1.8V as recommended in the user's guide for the EVK, the switchable loads will behave as current sinks when for LDO voltages greater than approximately 1 V.

Just something to bear in mind, as it is not explicitly stated in the GUI or documentation that these loads may very well behave as current sinks.


Crystal Oscillator Challenges

The 32.768 kHz crystal oscillator is a popular low-power clock source for many sub-systems in an electronics design. Frequent users of the 32K clock include: Real Time Clock (RTC), processor, RF modems/transceivers, and GPS receivers, just to name a few. Given the large number of potential consumers of a 32K clock in an electronics design, the MAX77714 provides 3 configurable 32K clock outputs on GPIO4 to GPIO6. To enable a 32K clock output in the MAX77714 EVK GUI, one must first enable Alternate Mode on GPIO6 by:

By default, GPIO6 has an open-drain output with no-pullup enabled. There are also no pull-up or pull-down resistors stuffed on the EVK for GPIO4 – GPIO6.

So, we must configure GPIO6 to have a totem-poll output in the GPIO6/7 configuration page as follows:

At this point you will see a clock signal on GPIO6 with levels defined by ‘IN_GPIOB’ which on the EVK is tied to VLOGIC, which is set to 1.8 V in the user’s setup instructions for the EVK. At this point we can measure the output frequency and stability of this clock signal on an oscilloscope, frequency counter, or spectrum analyzer, I elected to use my frequency counter. After connecting up a 10x probe to the GPIO6 test point (which are very nice KEYSTONE 5002 test points) I glanced over at my frequency counter to observe:

Not what I was expecting, 32.91 kHz. That is 4300 PPM off the nominal frequency of 32.768 kHz of the 32k crystal. That is way too high for any of the 32kHz crystals I have ever seen, on top of that the phase noise and stability of the oscillator was several orders of magnitude worse than what I would have expected from a quartz 32k crystal oscillator.


At this point I grabbed my oscilloscope and probed either side of the 32k crystal, no oscillation, not even a DC bias. Upon reviewing the datasheet for the MAX77714, the 32KSOURCE_OTP bitfield configures the PMIC to run with the on die 32k silicon oscillator at reset (not employ the external 32k crystal). This would allow you to omit the 32k crystal if you don’t require accurate time keeping with the RTC, just wish to use the MAX77714 solely as a PMIC.


I proceeded to try and enable the crystal oscillator in the EVK’s GUI, hoping to see the XOSCOK bit to transition high:

At this point my understanding of the 32k oscillator of the MAX77714 was not as complete as it is now and really was just experimentally bit twiddling in the GUI. The only bit fields presented in the GUI that are writable are:

Fortunately for me, this is the moment, I had an epiphany. I probed the 32K oscillator and saw the crystal oscillator break into oscillation running on the load capacitance of my 10x scope probe. As it turns out, there is no crystal load capacitance bitfield in the 32K_CONFIG (0x31) register, the bit bitfield is located in the 32K_Status (0x30) register and is read-only.

It gets worse, the GUI doesn’t address the PMIC bitfield correctly. Compare the datasheet register definitions to the EVK’s GUI definitions:

The GUI doesn't report the SIOCOK and XOSCOK bitfields, in order to read them one must execute raw I2C reads and writes in the CMOD Advanced UI window. Here, I am reading the 32K_STATUS register with 10x scope probes connected and disconnected:


To run on scope probes:

Write 0x06 to register 0x31

Wait for XOSCOK to transition high in register 0x30

Write 0x16 to register 0x31

The status register should now read 0x10


One will note that, 32K_LOAD still equals 0b00 (no load capacitors) in the 32K_STATUS register. An Element14 member noted that the datasheet suggests the 32K_LOAD value is adjustable with special test registers. Hopefully, Maxim will be able to provide details on how to access this test mode of the PMIC.


Why are the internal load capacitors disabled?

  • The datasheet indicates the reset value of the 32K_LOAD bitfield is 0b10.
  • The datasheet also alludes to 32K_LOAD being set by the OTP table, but it is not listed in the OTP table.
  • I believe this is a documentation issue regarding the OTP table.


Running on Scope Probes

Here is a scope capture of the 32K oscillator starting up with 10x scope probes attached:



Before issuing a clock switch request with XOSC_RETRY bit I output the silicon 32K clock output on a GPIO pin and probed the 32K crystal oscillator running. With the 2 oscillators running at two different frequencies the scope traces won't be synchronized.


Upon setting the XOSC_RETRY bit, the PMIC switches over to sourcing its 32K clock from the crystal oscillator. Now we can output the 32K crystal clock on GPIO6. Note when you clock switch you have to reenable the AME bit for a 32K output clock.


We now have a functioning 32k crystal oscillator:

The duty cycle of the 32K clock output appears to be roughly 30% ( I didn't measure it at the time) however this is running on scope probes. So, I will wait to see what the duty cycle is when running with the on die load capacitors.


The MAX77714 is also struggling to maintain oscillation in the low power drive mode:


Scope probes aren't low loss capacitors, so for now, I think that is a reasonable result.



I ran out of time to formulate a final review score. There is still a long list of additional features one can explore on this EVK.