RoadTest: Become a Tester of the Vishay microBRICK® Synchronous Buck Regulator EVB
Author: michaelkellett
Creation date:
Evaluation Type: Semiconductors
Did you receive all parts the manufacturer stated would be included in the package?: True
What other parts do you consider comparable to this product?: Analog Devices (Linear Technology) LT8640s.
What were the biggest problems encountered?: The part has a difficult footprint which is not supported by useable drawings. The web based simulator has limited capabilities and frequently crashes or runs very slowly. The operating frequency of the converter can't be synchronised to an external clock.
Detailed Review:
This Road Test is officially of the Evaluation board for the SiC067 microBRICK buck converter. I have mainly looked at the qualities of the chip itself and used the EVB as a tool to do that - which I think is the intended purpose of the EVB.
I have given the part rather low scores, which will be explained in the details of the test. I would much rather not apply scores at all, but since I must, then I have attempted to be fair.
The eval board looks like this:
The first thing you'll notice is that the chip is huge, and the second is that there are a lot of capacitors
(and more on the underneath):
It's a six layer board and is not designed to be used for any purpose other than evaluation of the SiC967. With a bit of effort and very little increase in cost it could have been designed to be useful for small volume production but, the only means of connection are via the screw terminals and top side pin headers and there is no way to attach it to a mother board or chassis. The addition of a couple of rows of 0.1" pitch pins would have extended the areas of application into small volume production.
The board has pin headers to allow selection of the output voltage (3.3, 5 or 12 V), the switching frequency, current limit, and the operating mode.
How to set the pins is explained quite well in the eval board "User's Manual which also shows the six layers of the pcb.
If you want to know more about how the chip works you will need to study the data sheet which goes into more detail and has links to the PowerCAD design tool and a list of evaluation boards.
The SiC967 isn't a simple single chip device but a control chip, two power MOSFETs and a power inductor all in one package.
I set my board up for 5V output and connected it to my DC Regulator Test Rig.
I had a little trouble getting it to work because I had put a jumper on J2 which disables the regulator. I then went down a rabbit hole because the data sheet incorrectly states that some fixed resistors will set the minimum operating voltage to 32V but in fact the resistors are set to allow it to work down to about 4V input. (Jan Cumps discusses the low voltage limit in his review.)
Once I had that sorted out it worked fine and gave it a quick test running from 8 - 24V input and 1 - 6 A output.
I made some new cables to make it easy to connect the board while working on it, so the first test I did was check the new cables.:

The efficiency graph looks fine, with less than 0.01% error at 6A and 5V.
First test of Eval board, set for 5V output and the recommended 500kHz switching frequency.

That looks about what we might expect.
My second experiment was to change the operating frequency to 1MHz. The regulator couldn't manage 6A so I reduced the maxim test current to 5A:

The SiC967 would definitely rather run at 500kHz than 1MHz.
For comparison this is the performance of an Analog Devices LT8640S. It's not a fair comparison because the LT8640S is mounted on a very small board, uses tiny inductors and is switching at 2MHz.
The LT8640S is only capable of 3A output on this board.

At 5V, 3A out with 15V in the SiC967 is a little bit more efficient than the LT8640S (93% v 90.5%) at its preferred 500kHz operating frequency.
My plan for this RoadTest was to design the SiC967 into one of my current projects which is a replacement plug in power supply PCB for an HP436A RF power meter. These power meters use TO3 style linear regulators with the signal earht connected to the device case. The 436A uses its metal chassis as the 0V rail for the 5V supply. I wanted to have an isolated and 5V supply and to avoid huge heat sinks, so a switcher is required.
This is the original HP 436A power supply board:

My first spin of a replacement power board for the 436A looks like this:
Like the original it has the rectifier for the 5V supply but not the regulator. My board does have the smoothing caps for the 5V supply - in the 50 years since HP designed this thing capacitors have got a lot smaller too !
There is plenty of room for the SiC967 after a bit of capacitor re-positioning.
So I started on a new PCB design - and hit the first big snag !
The SiC 967 has a weird footprint. It may not be the oddest in existence but it has a good try.

There isn't a drawing on the data sheet but if you hunt you can find one - and here it is:

The drawing is of the bottom of the chip - it's not a recommended PCB footprint. To turn it into a footprint it needs to be transposed to a top view and decisions made about sizing the pads. To make it as hard as possible - the chip has varying pad pitches, several different sizes of pads and doesn't use a co-ordinate system for dimensions but mainly relative dimensioning.
There are un-dimensioned features on the drawing (what's the gap between the little lumps on the inside edges of the two big bottom pads ?)
For a power chip it would be good to be able to use thicker copper than the normal 1oz but the 0.5mm pad pitch makes this a bit risky.
I asked Vishay Tech support about footprints. They answered promptly but could give me no more information.
There is a footprint on SnapMagic and I downloaded it into my PCB CAD. It's not nice because it lumps the joined together pins into single entities which while not exactly wrong is not the way I work. However, because it's a RoadTest I decided I would give it a go.
I got this far:


Having proved that I could fit all the parts on the board it was time to use the data sheet and simulator to calculate suitable component values and types.
There are some design equations in the data sheet which rely on the value of the internal inductor to help you calculate suitable values for output capacitor and its ESR (Equivalent Series Resistance). Nowhere in the data sheet is the value of the internal inductor stated. The second request to Vishay tech support was also answered promptly - it's 2.7uH.
Most of the major semiconductor suppliers offer some kind of simulation tools for their parts. Analog Devices (via their acquisition of Linear Technology) support their own branded version of Spice, which they make available for free and also use themselves in development. It's one of the best simulators available. TI offer both TINA and a version of PSpice - both are quite good. I'm not so familiar with other suppliers offering but they certainly exist.
LTSpice, TINA and PSpice are all full simulators - by which I mean that they don't just model the chip in question but that you can add other ciruit elements and model a complete design.
Various suppliers (including TI and AD) have also offered what I would call design tools, which can help you calculate support component values for a chip and maybe model the design behaviour. These tools can be useful but do not allow you to model additional circuit components.
Vishay's PowerCAD tool is very much in the second camp - in the case of the SiC967 you can use the tool to calculate support components suitable for certain design parameters but you can't add external components of your own selection and configuration.
I setup my design parameters like this:

This is the schematic it produces:

You can change the output cap like this:

I changed the output cap to something a bit more sensible:

And it said this:

The Recalculation took 25 seconds.
I did the efficiency and Power loss estimate - it took about 1 minute and made this page:

I re-ran PowerCAD after a break of about a month and spent an age trying to work out how to run a simulation !

Silly me ! Everyone knows that the simulation button hides under the title if your browser is less than about a mile wide !!!!!!!!!

I set this up:

It took 2minutes and 15 seconds to get the result graph up.
It looks like this:

Lets zoom in on that start up over voltage pulse:

That's truly horrifying - a peak of 7.4V is fully capable of destroying any 5V rated parts connect to it.
So either the simulation is wrong, or the design tool has made a bad job of things or my change of capacitors has screwed things up.
I stopped at this point for lunch, when I returned it had closed the session and dumped my design !
I tried re-loading the design but that didn't work (or else took longer than I could be bothered to wait.)
Closed it down and re-started the simulator. Ran with default values on everything:

Its even worse !
The overshoot peak is 8.4V.
I did play with the simulator a bit more - it crashes, its dreadfully slow, it tells you that the part is going blow your load up.
Where does one go from here ?
Well, this was the point at which I decided I would give up on doing a board of my own - I don't have these problems with other devices.
At this point I went back and revised my Demo Software and Support Materials scores down from 2.5 to 1.
When I was about ready to post this review I realised that I couldn't leave the start up in the simulator just dangling - so I hooked up the board (with modified caps and filter) to a 15V supply with a 4R7 load.
I pulse the enable (by un-shorting the J2 pins with a scalpel tip) and got this:

So the good news is that the chip seems to soft start in 6ms as it ought.
If you looked carefully at the screenshots in the preceding section you'll have noticed that the design tool wants to put 11 output capacitors in parallel. The Eval board makes do with 5. This is pretty crazy - there is no point in embedding the inductor if you still end up with 11 expensive capacitors on the output.
I did mean to use the simulator to try and establish if its ESR or capacitance that dominates the effect of the output caps on ripple and noise but that isn't viable. So I decided to play some hunches and do the sort of things that usually works and see how it went.
One thing you might do is increase the operating frequency but there are issues with doing that. The SiC967 is a fixed on time design. The on time is programmed by a resistor and the feedback loop will adjust the off time to control the output voltage. This design may have virtues but it also has two really bad downsides.
First, the switching frequency will vary with input voltage with a constant load, or with load current.
Second, the switching frequency can't be synchronised to an external clock.
This means that the part is not going to be usable in applications where power supply noise it mitigated by synchronising it with the operation of the rest of the system (many low noise applications).
I experimented by replacing the 5 x 22uF ceramic output caps (£1.90 worth at 1k off prices) with 1 x 47uF aluminium poly and 1 x 22uF ceramic (£1.19 cheaper).
The Al poly cap will have a higher ESR than the 4 ceramics in parallel that it replaces.
The following the measurements were made at 15V input and with a 1A load at 5V, with a 2MHz low pas filter.
Unmodified eval board with 5 x 22uF ceramic output caps

with the 47uF Al poly cap and only one 22uF ceramic
Increasing the frequency should improve things.
1MHz switching frequency:

The 550kHz ripple has increased from about 1mV (-59.7dBV) to 4.7mV(-46.6dBV)
Increasing the frequency should improve things.
1MHz switching frequency:

The ripple is down to under 1mV again but from some of the earlier testing we know that the SiC967 won't manage 6A out with over 15V input at that speed.
The ripple increases a little as the load current is increased.
This is 1MHz operation with modified caps at 1MHz.

It occurred to me that rather than sticking more and more ceramic caps in parallel we might do a lot better with a proper filter on the output.
This is the output of SiC967 with modified caps:

The bandwidth has been increased to 40MHz and the switching frequency is back in the SiC9067's comfort zone.
I designed a filter using LTSpice:

The inductors have series resistance of 15mR and 11mR. They are fairly tiny and come from the TDK SPM5030 series. The cost of the filter parts is about £1.50.
The load resistance has very little effect on the frequency response.
The improvement in the output noise is dramatic:

Not only is the output noise at the switching frequency down to about 0.5mV but all the other related noise spurs are less than 10uV.
Adding a filter to a switcher looks like a bit of a miracle cure - the ripple and noise are massively reduced and the parts are quite small.
There are downsides:
The inductors will have series resistance and will drop voltage and add to the I2R losses (I squared x R).
Ideally you would put the filter inside the feedback loop but this might well make the regulator unstable (some regulators can't cope with filters outside the loop either).
The usual way of avoiding these pitfalls is to use the simulator to check and improve your design but that isn't an option with the Sic967.
I measured the load transient as the board was delivered:

and with the new caps at 1MHz switching rate.

This is a perfectly adequate response in both cases.
The scope settings are not quite the same for the two tests.
The Eval board, purely as an evaluation tool was fine - it gave you a good feel for the chip and its support tools and the price asked for the board is a reasonable £29.74. Its a pity that the board doesn't have some pin headers because that would make it much easier to use as a component in small scale production. As a design example it is let down by being made on six layers - a 4 layer design would be a more useful.
Looking at the chip itself the picture is far less rosy.
The chip is expensive at 9.23 (reel of 1050 parts) compared with, for example LT8640S (£5.62 for 100 parts).
The design tool (PowerCAD) is poor. It's slow, awkward to use, crashes (a lot) and inflexible.
There is the issue of the start up overshoot (which seems to be a simulator rather than a chip issue !)
Integrating the inductor doesn't seem to cut the parts count.
The package design seems ill-conceived - the variable pitch, toothy pads etc make the part hard to design in.
The part would be much better in package designed for easy deployment on a 2oz copper board.
The basic design of the regulator prevents it from being synchronised to an external clock.
Having said all this it worked OK