HELLO FPGA Kit - Review

Table of contents

RoadTest: HELLO FPGA Kit

Author: moi8765

Creation date:

Evaluation Type: Development Boards & Tools

Did you receive all parts the manufacturer stated would be included in the package?: True

What other parts do you consider comparable to this product?: Digilent Arty A7-25T, Papillio One, Numato Spartan 6 series, Orange Crab and many more

What were the biggest problems encountered?: I guess exporting the .dat file generated from the Libero suite to the Hello FPGA Application everytime I made a change in the code was very annoying. It only made the nightouts I spend in the lab determined to get things to work much longer. Please find a solution to this.

Detailed Review:

The Hello FPGA kit is a low cost, compact-sized, entry-level platform targeted towards end-users with low to medium FPGA knowledge. The kit supports powerful demos in Image Processing, Signal Processing, Artificial Intelligence, and can measure the live FPGA core power consumption while running designs. The kit also allows users to freeze the design while maintaining the i/o state for low power applications, using Flash Freeze mode.  The kit features Arduino & Mikrobus connectors for flexibility when it comes to prototyping, and expansion kits, allowing for easy adoption in future projects.

 

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Hello FPGA Board

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Kit Contents – M2S-HELLO-FPGA-KIT

QuantityDescription
1FPGA mainboard with SmartFusion2 M2S010-1VFG256
1Camera Sensor Board (LI-0V7725-MICRO v1.0)
1LCD Board
1USB 2.0 A to Mini-B cable
1QuickStart Card

 

Resources and support are available at https://www.microsemi.com/existing-parts/parts/150925#resources

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The board comes in a sleek box with the mini-USB cable and the manual

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                                The front view

 

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                    The main board

 

 

The Hardware

Often when we look at embedded SoCs the first things we look at are the processors. The Hello FPGA kit calls out to the embedded connoisseur to look at it from a different angle. And rightly so. On looking at the kit, the first things things that grab our attention are the LCD shield and the Camera card. At the front, there is a 480x20 LCD display by Ilitek. Given the large size, it would be interesting to figure out the power draw for this LCD. On the other side is camera an OV7725 CMOS VGA camera capable of sending out crisp 640x480 imagery data in multiple formats over a parallel data bus. Another very obvious peripheral on the camera card is the mikoBus breakout on top to add a multitude of features to our FPGA kit while still exploiting the features of an image processing application. I find this really thoughtful of the hardware of the guys at Microsemi given the target market for this board.

The middle board includes all the active components, namely the SmartFusion 2 FPGA and a PIC32 microcontroller. The PIC32MX79S512L microcontroller is a high-end PIC32 microcontroller with astonishingly good features and it would be really fruitful to explore the performance of the MCU alone in an embedded application. Also important to consider would be the programming of the PIC microcontroller as there dosen`t seem to be a programmer onboard. As can be seen from the datasheet below, the MCU has support for CAN, USB and Ethernet along with 512KB flash and ridiculously many UART, SPI and I2C channels.

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The SmartFusion2 housed on the board is an M2S010-1VF256, and has 10K Logical Elements (LEs) for your FPGA design. Hey!! But I am a noob and I don`t know what these LUTs mean anyway. So how do I make sense of that figure. Good question and it was something that troubled me when I was choosing my first FPGA. A plain explanation would be that you can implement 10000 4bit multipliers on the FPGA. How does that translate into a real-world implementation. Well, that simply comes to you with experience and there is no shortcut to it. More on this later!!!

This SmartFusion2 SoC also includes a 166Hz Cortex M3 processor, including ETM and instruction cache with on-chip eSRAM and eNVM and a complete Microcontroller Subsystem (MSS) with many peripherals, including CAN, TSE, USB, UART, SPI, I2C.

The external PIC32 MCU runs a C application to program our FPGA, measure power consumption and communicate via USB to the provided Hello_FPGA_GUI application. Finally, the onboard memory devices include a whooping 8 GB DDR3 RAM and an 8 MB SPI Flash used to store bootup images.

It can eventually be programmed by connecting a standard ICD3 programmer to the typical 6-pins connector. According to the schematics available here, the PIC32 is connected to the SmartFusion2 through 3 interfaces: SPI, I2C and UART. Also, two LEDs (identified as LD4 and LD5) on the PCB are connected to the PIC32, thus making them usable for a user application. They aren`t as many as on the Basys kit or the Artys but then, this board is better in so many other ways.

To appreciate the perks of this design, we would have to actually put it to test and see how it  performs. The Microchip people have taken care of that too in case you are in doubt. The hello FPGA GUI application comes in handy here as it allows us to measure the power consumption on the core FPGA, something that is really important while analysing edge application performance. The simulation tools in IDEs like Vivado do allow us to do static analysis but prediction of dynamic applications has been something previously not possible. There is no documentation available as to how the computation is done and it would be really beneficial to get hold of the MCU code to figure out.

 

 

The Hello FPGA GUI application

The Hello FPGA GUI desktop application is a really useful tool to demonstrate the example applications that come with the kit. Historically, Microchip always has provided interesting demos for its development boards I have using for so long. This time too, they haven`t disappointed the loyal customer by providing really great example applications that demonstrate the capabilities of the board. However, this time they have gone a step further and created a GUI application based on Java(clearly) for all noobs who may be intimidated by the intricacies of a hardware bring-up tool like Libero Suite. It is also great for folks who like to see their device in action, right after unboxing.

Let me walk you through the application though I guess you would not need a guide given the easy to understand interface.

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                                             The Hello FPGA GUI Application

The first thing to note while using the application is that the board must be connected to a USB port on your system and that the COM port needs to be connected. To do this, simply click on the icon I have indicated in the figure above. The next step is to load an example application on the board. This can be done by clicking the Browse icon beside the DAT file dropdown menu and hitting the Run button. This loads the bitstream file to a location in the flash of the microcontroller which does the task of loading it into the FPGA. Now, that the FPGA has been programmed, we may use the GUI to play with the example application. The Power graph tab allows us to see the power draw of the FPGA core over a period of time. This can be extremely useful in cases where we want to check the power draw on making a change in the algorithm or analysing the computational effort for a particular section of the code.

The other tab called FPGA Demo has features specific to the application and I would demonstrate those as I move ahead with the testing.

 

 

 

 

Testing

The Image Processing Demo

The most eye-catching demo available is the digit recognition demo that as the name implies recognises digits in scenes recorded by the camera. The only constraints are that the aspect ratio of the digit has to be 1X1 and it should be in good focus. The reason would be explained later. For now, let me show you how the demo performs in practice.

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This is the FPGA Demo tab that opens up. Interesting is to note that the model is pretty well trained for it recognises digits even if they are lopsided, skewed or even blurred and I found this really impressive. As shown the GUI provides a set of digits that can be used to test the example application. The detected digit is also sent over to the GUI over UART by the board and is displayed on the left in red. The LCD screen also gives an indication of what the camera is actually sensing now and the detected digit on the left side bottom portion of the screen.

I tested the board for digits available in the GUI as well as random digits I found throughout the house like calendars, newspapers and even my dog`s collar - much to the amusement of family members and I must say I am impressed with the detection speed and accuracy. The only woe here is that I had to adjust the camera focus almost everytime I wanted a different type of digit.

 

 

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These are some digit recognitions I performed right off the GUI

The LCD screen may appear to be really dim here but I assure you it isn`t as dim actually

 

 

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I managed to recognise the digit 5 on my laptop`s keyboard which should give you a fair idea of what accuracy the camera can accomplish even at such small distances

 

The MOdel and Design and model on Libero suite

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The functional block diagram design of the implemented IP application

For a beginner the diagram above might look really daunting. However, once you are versed with the nuances of modular configuration of FPGAs, believe me this would be a breeze.

The above diagram on being observed closely reveals the following information. The imagery data comes in from the camera to the line_write_read block which -

  • Reads data from the camera in the 640x480 format
  • Writes scaled image to LCD(ie first converts it to a 320x240 image)
  • Writes scaled image to flash memory block for use by TOP_CNN block

The TOP_CNN block expects a 28x28 pixel image and processes the image according to the pipeline below as given in the Hello FPGA GUI application.

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                                                       The implemented CNN as in the FPGA GUI

The network implemented in the demo contains 4 convolution layers, a max pool layer, and a fully connected layer. The network is trained from the standard MNIST handwritten digit database which contains the digits in 28x28 resolution images. The CNN can detect a single digit in the 28x28 image when the aspect ratio of the digit is approximately equal to the aspect ratio of the trained image data set. The network is built for only 10 classes for digits from 0 to 9 and does not use a class that shows no digit. Hence even though the camera is not pointing to a digit, the network will still output a digit that has the maximum value from the fully connected layer.

The output of the CNN is sent out to the external PIC32 microcontroller through the UART interface to the Hello_FPGA_GUI where the detected digit is displayed.

 

The LCD Image Capture Demo

The LCD Image Capture demo may not seem as dynamic as the previous demo. However, it lets the user configure the parameters of the captured image displayed on the LCD screen through an easy to use GUI. On the GUI, we can see the measured power consumption of the board when processing the image. It is observed that on tweaking the parameters, the power draw also changes. It would be interesting to dynamically vary the parameters for edge applications that I plan to build with this board.

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The FIR Filter Demo

The FIR filter demo as the name implies is a demo that artificially generates a sinusoidal wave of a specified frequency and implements various digital filters to filter the signal. The GUI is astonishingly similar to Filter Designer available in Matlab(which I use quite often). It lets the user configure the frequencies of two input signals which are added up and then fed to a filter. It allows the user to decide the type of filter and decide the cutoff frequencies. Accordingly, the output filtered signal is generated as shown in the figures below.

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As shown in the input parameters tab I have made a bandpass filter. The scope on the right shows that indeed the filter works just as desired. Interesting is to note is the fact that just like Matlab, the GUI allows us to zoom in and out and shift the signal as per our convenience

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A very convenient utility offered in this example is the text viewer which gives measures of the plotted signals. These signals can directly be copied into a mat variable in a Matlab workspace for further processing which is an interesting proposition in case one wants to judge the quality of the filter.

Another really good feature i found in this demo is the autosweep feature that allows one to sweep one of the input signals, to observe the permitted frequencies in the output. This can be very useful in cases where one would like to plot the frequency response of a filter. One interesting thing that I would like to modify this example for is to feed an unknown signal into a predefined and filter and modify the filter to suit my desired response.

 

Power Consumption Analysis

One of the USPs of the Smartfusion2 core is the low power consumption and the roadtest would be incomplete without including that analysis. The GUI offers the option to view the power consumed over time. It also gives the flash freeze option that stops all onboard computation to bring the FPGA core to sleep. How this happens exactly would be something interesting to explore but for now let`s just do with what information we get from the GUI.

When running the LCD screen capture demo, I found the idle power draw to be around 0.1W. In flash freeze mode this drops to around 0.035W indicating that almost 65% of the power is consumed in the FPGA core number crunching the pixel data from the camera as explained earlier. On starting the FIR filter application, the power draw rises to 0.1335W. This can be qualitatively explained by the fact that the number of computations for the digital filter are far many. How many?? Good question but to answer that would require a deeper analysis of teh FFT algorithm implemented. Also, the FFT application puts a lot of computation effort on the auxiliary PIC microcontroller that has to send all the filtered data and the inputs to the GUI application over UART. This also means that the overall power draw would also be more for the FIR filter application.

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The above plot was obtained by removing the LCD screen while the FIR filter demo is running. We can immediately notice a drop in power consumption of 0.06W. Why this is 60mW and not 100mW as in the LCD demo is beyond me. Maybe there is an open circuit detector in the hardware that commands the FPGA to not send any data to the display. This too would need some more investiation

 

 

Interfacing the FPGA with the microcontroller

OK!! So we are done with the example applications and it`s time to get our hands dirty. The most important thing I believed that should be tested first was the interfacing between the PIC32 microcontroller and the FPGA core.The  Fabric Interface Controller (FIC) block available in the demo file models allow for connection between the two entities.  The SmartFusion2 has two fabric interface controllers (FIC_0 and FIC_1) as a part of the Microcontroller Sub System (MSS).

Some things that became obvious from the documentation were -

  • The FIC blocks are present to interface the SmartFusion2 MSS AHB-Lite (AHBL) bus to user masters or user slaves in the FPGA fabric.
  • Each FIC block performs an AHBL to AHBL or AHBL to APB3 bridging function between the AHB Bus Matrix and AHBL or APB3 bus in the FPGA fabric.
  • Each FIC block provides two bus interfaces between the MSS and FPGA fabric. The first one is mastered by the MSS and has slaves in the FPGA fabric; the second one has a master in the fabric and slaves in the MSS. The bus interfaces to the FPGA fabric can be either 32-bit AHBL or 32-bit APB type.
  • The FIC block provides registered bridging between the MSS AHBL interface and the FPGA fabric AHBL/APB circuitry to run at frequency ratios of 1:1, 2:1, 4:1, 8:1, 16:1, or 32:1.
  • SmartFusion2 FIC has six memory regions. You can allocate a memory region to a particular FIC that is either to FIC_0 or FIC_1. Each memory region has a predefined memory map.

More information about MSS can be found here though I do not think a deepdive is needed at this stage

 

 

Programming the FPGA

The tutorial available on the Microsemi website gives a very good step by step procedure to program the Smartfusion core.

The flow to create an FPGA design and to generate the C code for the M3 application that programs the FPGA core is -

  • Create a project for a SmartFusion2 SoC FPGA using the Microsemi Libero SoC toolset
  • Use SmartFusion2 System Builder to Configure MSS and generate System Builder Component
  • Configure fabric interface controllers (FIC_0) to interface user logic in the fabric with the MSS
  • Use on-chip oscillators and fabric CCC (FAB_CCC) for generating system clocks
  • Write a bus functional model (BFM) script for simulating the design
  • Verify the design by running BFM commands
  • Generate the programming file to program the SmartFusion2 device
  • Open the project in SoftConsole from Libero SoC and writing the application code
  • Validate the application design on SmartFusion2 board

This design flow is also available at the left-hand side of the Libero Suite

The code in the tutorial uses Libero 11.7. The currently available version is Libero 12.5. However, since there are no revolutionary changes, following along wasn`t a hassle. In general, the settings for the "StarterKit" are good enough to get one started. There are two very interesting Design Tools available in Libero Suite namely the System Builder and SmartDesign which have strong resemblance to Vivado Design Suite.

Programming the device

The only way to program the device is to export the bitstream into a dat file and download it using the Hello FPGA GUI application. This is quite hectic in my opinion as often, we make some small change in the design while prototyping like tweaking a constant in the code and want to see the change immediately. This is if you do not have a JTAG programmer which most probably, you would not be having.

The other way is to use SoftConsole, an Eclipse-based IDE for editing, building and deploying applications to the SmartFusion2's Cortex M3 processor. In SoftConsole, you can write your own C code that will be run on the Cortex M3 processor which is integrated in the SmartFusion2 FPGA. Getting started with the SoftConsole is not so easy and I had to struggle a lot, like the other roadtesters. Finally, the tutorial I found here saved the day.

Conclusions

The Hello FPGA kit is a great evaluation kit at a very low cost a lot of computing power and add-on boards for a camera module and an LCD module. It has an internally connected M3 microcontroller and a peripheral PIC32 microcontroller which in itself is a powerhouse of a microcontroller which can be independently programmed. I have outlined here what I felt about using the boards during the roadtest.

 

The Good, the Bad and the Ugly

The Good

  • The example applications are really good and the documentation is also great. Directly copying the SMart Designs in Libero open up so many opportunities for innovative projects based on these designs
  • The Libero Design Suite is quite user-friendly and offers interesting Design Tools like SmartBuilder and SmartDesign
  • Arduino and MikroBUS extension headers
  • LCD screen which can be used for a variety of applications
  • The camera may not be the best but does the job for basic applications

The Bad

  • Lack of example applications for even basic applications and not much support available online
  • Lack of APIs for interfacing the FPGA with the Arduino or MikroBUS interfaces(Unless the Microsemi guys expected me, as an element14 roadtester to do that. Obviously, I will do that eventually though to make the most out of my board)
  • Some features in the Libero Suite leave the user in doubt, especially the simulation section, giving vibes of using earlier versions of infamous Xilinx ISEs.
  • No provision to program the FPGA from SoftConsole directly(I mean without a JTAG adapter which beginners won`t have. Anyways even I wasn`t able to program it through the JTAG header)
  • SoftConsole is not seamlessly integrated in the Libero SoC suite as one would like (or expect)
  • On connecting the LCD, the Arduino headers cannot be used

 

The Ugly

  • Well, I haven`t figured out anything that can be called as ugly

 

So, should I buy it

The answer would be different for users with different levels of familiarity with FPGAs. If you are an absolute beginner I would suggest you to get hold of a board from a more established development ecosystem like an Arty or a Basys that can be programmed from Vivado for which lots of support is available both from the vendor and from open-source projects. Another option could be the Papilio One if you are the more adventurous kind. however, the hand-holding comes at a cost and it is much higher than what the Hello FPGA kit has to offer. The Hello FPGA kit goes a step beyond conventional FPGA programming and challenges the user to expand their horizons to advanced applications based on FPGA. Gone are the days when you program a Digilent Basys to just glow some LEDs on board or trigger a buzzer. The Hello FPGA kit provides Arduino and MikroBUS interfaces(although without the APIs) to allow the user to plug in whatever shield they wish and get started with 'real' projects. And all this for a much much lesser price.

Therefore, for an intermediate hobbyist who has some experience with FPGAs and is looking to build some useful applications around FPGAs, this board seems to be a must-buy. At this price, the computing power you get is unmatched. Obviously, there is the lack of an ecosystem that Xilinx or Intel have established for example but I think as the platform picks up, Microsemi as well as the open-source community would take steps towards emulating that model. I am really happy with the tests I have done till now on this board. I hope you appreciated my views and would take back something from this article.

Again, I would like to thank Microchip and element14 for giving me the opportunity of roadtesting this wonderful product.

 

Cheers,

Moinak

Anonymous
Parents Comment Children
  • Yes. Surely I am and that was the plan too. I am actively working towards getting a pose estimation model running on the FPGA but have been unsuccessful till now. However, I will keep trying and update the review as soon as I am done. Again, you must understand that since the platform is new, support is limited and I have to walk unwalked territories on my own, Therefore, it is taking longer than usual