USB104 A7: Artix-7 FPGA Development Board - Review

Table of contents

RoadTest: USB104 A7: Artix-7 FPGA Development Board

Author: Ujjval Rathod

Creation date:

Evaluation Type: Independent Products

Did you receive all parts the manufacturer stated would be included in the package?: True

What other parts do you consider comparable to this product?: Any other FPGA board from Digilant or Xilinx FPGA development boards.

What were the biggest problems encountered?: In order to work with Digilent FPGA boards, it is required to have Vivado and Vitis installation which is quite large downloads and installs(50GB minimum). Also, there are specific Linux distros needed to install them properly(Another distro might work properly but not guaranteed). It took time to install drivers/design a project in Vivado like a Microblaze soft-core processor working example.

Detailed Review:

Overview on FPGA:

 

The USB104-A7 FPGA board is the FPGA development board in PC form-factor from Digilant featuring the components listed in the table below.

The board comes with Artix-7 type of FPGA. Xilinx has basically the following set of FPGA devices

 

Xilinx FPGA typeDescription
VirtexHigh end 16 nm, 20 nm, 28 nm
KintexBalanced cost/performance/energy 16 nm, 20 nm, 28 nm
ArtixLow power, Low cost 28 nm
SpartanLow cost 28 nm, 45 nm

 

 

CalloutDescriptionCalloutDescriptioncalloutDescription
1.Xilinx Artix7 FPGA6.FPGA programming reset button11Mode select switch
2.Micron DDR3 Memory7.Pmod Ports12USB hub configured indicator LED
       3.Barrel jack for external power supply8.User Buttons and LEDs13USB JTAG/UART data transfer port
4.Power good indicator LED9.SYZYGY VIO Power Good Indicator LED
5.Programming is done LED10.Zmod/SYZYGY Port

 

 

The board contains the following features:

  1. Xilinx Artix-7 FPGA(XC7A100T-1CSG324I)
  • 15850 slice containing four 6-input LUTs(Look-up tables) and 8 flip-flops a piece.
  • 4860 Kbits of fast block RAM
  • 6 clock management-tiles each with phase-locked loop and mixed-mode clock manager
  • Internal clock speed exceeding 450MHz

    2. Memory

  • 512 MB Micron DDR3 with 16-bit bus
  • 16 MB Spansion quard-SPI Flash

    3. Power

  • Powered over USB 5V external power source

    4. USB

  • DPTI/DSPI data transfer interface
  • USB/JTAG programming circuitry
  • US/UART bridge

    5. Zmod Port

  • One port following SYZYGY standard interface
  • 8 differential I/Os 16 single-ended I/Os

    6.Pmod Ports

  • 3 twelve pin ports with a total of 24 FPGA connected pins

 

Let's have a quick look at what is inside of an FPGAs. Configurable Logic Block(CLB) is a fundamental component in FPGA. It allows having virtually any circuit within the chip. This is possible with the help of two

similar kinds of slices in a CLB. SLICEM and SLICEL. There are as many as twice SLICEL then the SLICEM. Though the actual number may vary. Each slice has 4or 6-LUTs. It also contains 8 flip-flops a network

of carry logic and three types of Multiplexers.

 

Installation

The latest download is Vivado  2021 Vitis 2021 which also supports Linux Ubuntu 20.04.(I have used this)

On the website of Xilinx in the download section, There is for Windows EXE file or Linux BIN file for a GUI-based selection of components and software to download and install.

https://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/vivado-design-tools.html

 

--------Type the following command on the command line to start the installer------

sudo chmod +x Xilinx_vivado.bin

./Xilinx_vivado.bin

After the installation is finished go to the Vivado/2020.2 directory and type the following to start the Vivado IDE.

 

source settings64.sh

vivado

The FTDI drives are also needed to detect the FPGA board correctly. To do so go to the following directory

/Vivado/2020.2/data/xicom/cable_drivers/lin64/install_script/install_drivers

./install_drivers

 

Microblaze Design:

 

A Microblaze is a soft-core processor from Xilinx. It is a programmable, device-optimized 32-bit RISK soft processor core. which can be emulated on the FPGA such as Artix-A7.

There are several advantages of using soft-cores in a design which are listed as follows.

 

  • Customization:

As a soft-IP core, Microblaze enables the user to customize the hardware based on their needs. Multiple instances of the processor can be instantiated on the same hardware device.

There is the availability of configurable peripherals which helps in the design of custom embedded applications.

  • Obsolescence mitigation:

Some industry such as Aerospace and Defence needs component and embedded design to function for long life span. Component mitigation is a problem in such cases.

With soft-core, the same design can be emulated on different hardware.

  • Cost reduction through system integration:

The system's digital components can include DSPs, FPGAs, ASSPs, SoCs etc. While it’s analog components can include Sensors, ADCs and physical interface.

Xilinx’s low end portfolio device can include all of them in a single chip, reducing the component count in the design companies can reduce the cost significantly.

  • Hardware acceleration:

This is perhaps one of the most compelling reasons to choose a programmable embedded device. For example, if the algorithm can not run on the target device a special

engine can be designed on an FPGA to run specifically that algorithm.

 

A Microblaze design to interface P-ModNaV.

The following two links will take you to the MicroBlaze product page to have more details about the processor and

A diligent P-modNaV sensor module.

https://www.xilinx.com/products/design-tools/microblaze.html

https://reference.digilentinc.com/reference/pmod/pmodnav/start

 

The process to get started with Microblaze on Digilent board starts with installing the BSP files for the boards and copy and paste the BSPs in the folder Vivado_install/data/boards/board_files

After that create a new project and give it a suitable name, Select RTL project in the window and click on next. After that click on the board's tab and select the USB104-A7 board.

Create a new block design and give it a name. Add Microblaze and other required components in the design such as AXI_peripherals, Clocks, Memory, GPIO, Pmod_Nav, and LED with

buttons etc. Once the design is complete save the design and export the hardware from files->export hardware. The last thing to do is to Generate the bitstream file.

 

It will take some time as the Generate bitstream file will convert the HDL design in the bitstream to finally upload onto the FPGAs. Once the bitstream is generated don't open the bitstream

file instead close the dialog. Next is to open Vitis from Vivado to program the Microblaze microcontroller and get the data from P-modNav. From Tools->launch Vitis IDE.

 

Open the .xpr exported design in the Vitis which you exported previously from Vivado. This will open the entire project but without a main() file. There are some examples that you can find on

github specifically for P-mod nav. Copy the main file in the /src directory of your Vitis project. Next few steps are to build the project and run the project.

https://github.com/Digilent/vivado-library/tree/master/ip/Pmods/PmodNAV_v1_0/drivers/PmodNAV_v1_0/examples

 

Click on the hammer to build the project. If there is no error then you are quite lucky that you have reached to the end. Now next task is to program the FPGA.

From Xilinx->program FPGA, there should be the USB104-A7 detected if the driver installation for FTDI is correctly done.

 

In the project explorer window keep the P-mod project selected. and from run-> RunAs-> Lauch Hardware. The program should now upload to the target FPGA device.

Once this is finished open a serial terminal window with a 9600 baud rate and the settings shown in one of the windows in the following image.

 

Overall it was a good experience to work on FPGA board USB104-A7 from Digilent. It took some time but there it different from what we know about Microcontrollers and

embedded design. Here, we can flash the Microcontroller itself onto the FPGA and then program the existing device in C/C++ to get the sensor data etc.

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