Blog - All Comments

RE: 555 Voltage Controlled Oscillator

msk167 — Sat, 05 Aug 2023 20:07:12 GMT

Dear 555 timers group.

I am interested in building this vco ramp generator with the neat voltage control circuit.

I am having some difficulty seeing how this new op amp controlled circuit replaces the voltage divider constant current source. I get that there is a replacement but it looks like the 555 connections are slightly modified.

Could you please send a schematic that shows the op amp and two transitor control circuit connected to the 555 circuit.

Thank you.

msk167

RE: 555 Frequency Synthesizer

DAB — Sat, 09 Jul 2022 18:24:50 GMT

It is always good to see a 555 used for a project.

Amazing device.

RE: 555 Frequency Synthesizer

shabaz — Fri, 08 Jul 2022 18:00:43 GMT

This is really awesome. Was there a 555 Project14 recently, I can't recall? This could have been an entry as the world's most stable 555 oscillator : )

RE: 555 Phase-Locked Loop (PLL)

michaelkellett — Fri, 01 Jul 2022 14:24:58 GMT

Really good blog - thanks.

I have my Efinix board and hope to play with the software tomorrow. I may well give this a try.

RE: 555 Phase-Locked Loop (PLL)

jc2048 — Thu, 30 Jun 2022 14:43:20 GMT

In The Designer's Guide to VHDL (2nd edition, 2002), Ashenden says "Occasionally we might design an asynchronous circuit: a sequential circuit without a clock or enable input. Such circuits store state using combinatorial feedback loops. The synthesis standard and most synthesis tools do not support synthesis of these kinds of circuits."

RE: 555 Phase-Locked Loop (PLL)

Jan Cumps — Thu, 30 Jun 2022 11:53:37 GMT

[mention:4f57fc9d538949ad9eb336ddb9469bb8:e9ed411860ed4f2ba0265705b8793d05], there's an extra space in the url to your summary page. It navigates to an error page.

RE: 555 Voltage Controlled Oscillator

Jan Cumps — Thu, 30 Jun 2022 11:27:18 GMT

I ran your design through the Vivado tools, with Spartan-7 selected as FPGA.
Synthesized schematic:

Implemented:

readable PDF.

[View:/cfs-file/__key/commentfiles/f7d226abd59f475c9d224a79e3f0ec07-81f30b38-3084-4f3c-9506-43e63572ae92/synthesis_5F00_schematic.pdf:640:360]

[View:/cfs-file/__key/commentfiles/f7d226abd59f475c9d224a79e3f0ec07-81f30b38-3084-4f3c-9506-43e63572ae92/implement_5F00_schematic.pdf:640:360]

RE: 555 Phase-Locked Loop (PLL)

shabaz — Wed, 29 Jun 2022 22:38:53 GMT

I'm wondering whether I should try to resurrect the PLL HDL which I was working on, in case I can get it going. It would be awesome to integrate the phase comparator HDL which you've created, since my HDL was missing that (I was planning to use an external one).

I too was using Lattice, and was wondering, have you found any way of viewing the top-level graphically with IceCube2? I've searched online, and can't see how to do it. After there are more than a few components in the top level, it gets tricky (to me at least) to mentally picture how they all connect, and I probably sketched a diagram at the time on paper, but I've lost it, so was wondering if there was a way to auto-generate a diagram.

RE: 555 Phase-Locked Loop (PLL)

robogary — Wed, 29 Jun 2022 20:26:13 GMT

wow !

RE: 555 Phase-Locked Loop (PLL)

genebren — Wed, 29 Jun 2022 16:12:10 GMT

Very interesting blog topic and implementation. I look forward to your further developments on this topic.

RE: 555 Phase-Locked Loop (PLL)

cstanton — Wed, 29 Jun 2022 12:28:44 GMT

Cleaned it up for you:

RE: 555 Phase-Locked Loop (PLL)

shabaz — Wed, 29 Jun 2022 11:19:55 GMT

Hi Jon,

Thanks for writing this up, and providing the VHDL. It makes it all a lot clearer, and I doubt there are many other resources showing in this level of practical detail how a PLL can be implemented using an FPGA.

RE: 555 Voltage Controlled Oscillator

genebren — Mon, 13 Jun 2022 15:36:50 GMT

Great blog. I am very impressed with the linearity of the V to F. Working with a commercially available synthesizer which I was attempting to control the VCO from an external DC control voltage, I was somewhat disappointed in the periodic frequency shifts while tuning the circuit. It is nice to see what you were able to achieve here.

RE: 555 Voltage Controlled Oscillator

shabaz — Mon, 13 Jun 2022 14:27:02 GMT

Nice! I would not have guessed it would become a VCO, and that's a great range, more than 10:1.

I can guess fairly well (I think) where you are going with this, because I had a similarish need myself a while back, although I didn't blog about it because I didn't get to any decent point, my VHDL knowledge is really poor. My VHDL implementation did something, but there were enough grey areas in my understanding that I couldn't feel confident in what I was implementing was what I intended.

In my case it was for a radio project, and eventually I used a ready-made clock synth chip, which still irritates me, because I really wanted to get it working with a homemade PLL.

RE: 555 Voltage Controlled Oscillator

Jan Cumps — Mon, 13 Jun 2022 10:51:24 GMT

you may be able to guess where I'm going for part three.

Inject DC offset?