<?xml-stylesheet type="text/xsl" href="https://community.element14.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>Getting Started with the USRP B205mini-i software defined radio platform</title><link>/technologies/embedded/b/blog/posts/getting-started-with-the-usrp-b205mini-i-software-defined-radio-platform</link><description>The USRP B205mini-i USRP B205mini-i is a flexible and compact platform that is ideal for both hobbyist and OEM applications. It is designed by Ettus Research™︎ and provides a wide frequency range (70 MHz to 6 GHz) and a user-programmable, industr...</description><dc:language>en-US</dc:language><generator>Telligent Community 12</generator><item><title>RE: Getting Started with the USRP B205mini-i software defined radio platform</title><link>https://community.element14.com/technologies/embedded/b/blog/posts/getting-started-with-the-usrp-b205mini-i-software-defined-radio-platform</link><pubDate>Wed, 10 Mar 2021 09:02:28 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:dd724249-d688-4e86-b99f-f11f1ff02f5c</guid><dc:creator>14rhb</dc:creator><slash:comments>2</slash:comments><description>&lt;p&gt;Hi &lt;span&gt;[mention:e64c55115f534cfca9634c39efe170af:e9ed411860ed4f2ba0265705b8793d05]&lt;/span&gt; &lt;/p&gt;&lt;p&gt;&amp;nbsp;&lt;/p&gt;&lt;p&gt;A good introduction, thank you.&lt;/p&gt;&lt;p&gt;&amp;nbsp;&lt;/p&gt;&lt;p&gt;There&amp;#39;s several posts on E14 currently discussing SDR and perhaps you could answer some questions I have pondered for sometime and been unable to answer from the internet.&lt;/p&gt;&lt;ul&gt;&lt;li&gt;Once a GNURadio schematic is created and run, where is the majority of that processing undertaken - on the SDR&amp;#39;s FPGA or on the host PC ?&lt;/li&gt;&lt;li&gt;If not answered in that last question, what purpose does the FPGA play?&lt;/li&gt;&lt;li&gt;If processing is undertaken on the host PC, is it possible to wrap that design, and download to the FPGA, such that it is a stand alone RF system without a host PC?&lt;/li&gt;&lt;/ul&gt;&lt;img src="https://community.element14.com/aggbug?PostID=10880&amp;AppID=7&amp;AppType=Weblog&amp;ContentType=0" width="1" height="1"&gt;</description></item></channel></rss>