<?xml-stylesheet type="text/xsl" href="https://community.element14.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>RISC-V Becomes the New Standard In Devices</title><link>/technologies/embedded/b/blog/posts/risc-v-becomes-the-new-standard-in-devices</link><description>Devices, such as a laptop, have an instruction set architecture, and the RISC-V is becoming a new standard. (Image Credit: Enkin_Akyurt/pixabay)
Both the x86 and ARM ISAs (Instruction Set Articheture) are commonly found in varying devices. However, .</description><dc:language>en-US</dc:language><generator>Telligent Community 12</generator><item><title>RE: RISC-V Becomes the New Standard In Devices</title><link>https://community.element14.com/technologies/embedded/b/blog/posts/risc-v-becomes-the-new-standard-in-devices</link><pubDate>Thu, 04 May 2023 17:57:05 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:4fbdaff8-0e6b-4e9b-8f13-c15a2761bf45</guid><dc:creator>embeddedguy</dc:creator><slash:comments>0</slash:comments><description>&lt;p&gt;A good comprehensive article BTW companies will have to create software support for RISK-V mainly because other hardware protocols and stuff work ideal in both.&amp;nbsp;&lt;br /&gt;I read an article where Nordic semiconductors will also have RISK-V processors in the upcoming nRF54 series. Interesting is also that how this multiple cores communicate with each other over some protocols.&lt;/p&gt;&lt;img src="https://community.element14.com/aggbug?PostID=25866&amp;AppID=7&amp;AppType=Weblog&amp;ContentType=0" width="1" height="1"&gt;</description></item></channel></rss>