DSP Forum - Recent Threads

RE: Algo for rms computation?

scottiebabe — Mon, 24 Jul 2023 13:29:16 GMT

Your bandwidth isn't too far off audio

I wonder what some of the spare no expense sound level meters do, presumably all of the analysis is done in the digital domain, with perhaps a programable LNA up front...

Wish the teardown photos were higher resolution, lol

https://fccid.io/2ASFB-2245-1/Internal-Photos/Internal-Photos-4337264

Oh and also a neat chip!

Algo for rms computation?

ggabe — Wed, 19 Jul 2023 05:38:04 GMT

I’m entertaining a true rms computation on MSPM0G3507 for the 10Hz…100KHz range.

The MCU is limited to 32K RAM, so I’d change the sampling frequency if I can determine the signal is periodic and in the lower frequency range.

Is there any algorithm that aims capture N periods of a periodic signal?

Should I be better of by going into frequency domain with a proper window function, and possibly trying multiple sampling rates to choose the proper range?

RE: Algo for rms computation?

ggabe — Mon, 24 Jul 2023 10:34:44 GMT

True! And it has one extra ENOB on the ADC specs, as TI boldly points out.

What I also like about the TI EVB is the SMPS is implemented with software loop control. Allows exact power consumption measurement.

RE: Algo for rms computation?

michaelkellett — Mon, 24 Jul 2023 10:31:28 GMT

What I liked about the TI part is that it's so cheap !

I have a project for a client in mind where it's a prefect fit (and the cheapness matters).

I've ordered a couple of the eval boards.

RE: Algo for rms computation?

ggabe — Mon, 24 Jul 2023 10:00:32 GMT

If the TI part piqued your interest then there is STM32G431. It has single precision float, CORDIC and FMATH accelerators, imo better than IT's offering.

Cordic features

24-bit CORDIC rotation engine
Circular and Hyperbolic modes
Rotation and Vectoring modes
Functions: Sine, Cosine, Sinh, Cosh, Atan, Atan2, Atanh, Modulus, Square root, Natural logarithm
Programmable precision up to 20-bit
Fast convergence: 4 bits per clock cycle
Supports 16-bit and 32-bit fixed point input and output formats
Low latency AHB slave interface
Results can be read as soon as ready without polling or interrupt
DMA read and write channels

FMAC features

16 x 16-bit multiplier
24+2-bit accumulator with addition and subtraction
16-bit input and output data
256 x 16-bit local memory

Up to three areas can be defined in memory for data buffers (two input, one output), defined by programmable base address pointers and associated size registers
Input and output sample buffers can be circular
Buffer “watermark” feature reduces overhead in interrupt mode
Filter functions: FIR, IIR (direct form 1)
AHB slave interface
DMA read and write data channels

RE: Algo for rms computation?

michaelkellett — Thu, 20 Jul 2023 07:51:36 GMT

I'll be very interested to see how you get on with this. My own (limited) experiments in this direction have suggested that the ex. dec. has the advantage of stability and predictability but that more tuned methods which make assumptions or self modifications based on the signal may give very good results with some signals but can be caught out by others. My work was done on ST32H7 series processors which have the advantage of 16bit ADCs (not the best 16 bits I've ever seen) and the 400MHz 64 bit FP possibly makes up for the lack of the accelerator.

I'm still working on the indirectly heated thermistor concept (which is an almost perfect physical analogue of the process I described above) but in reality it trades one kind of complexity (ADC, memory and maths) for a probably more expensive complexity in terms of insulation , heaters and thermal control ☺. But I have other reasons for being interested in the thermal control aspects so it remains a useful project to me.

RE: Algo for rms computation?

ggabe — Wed, 19 Jul 2023 18:27:57 GMT

I think the algorithm with Ki used to be referred as exponential decay averaging. The alternative, the moving averaging has a sensitivity when the weight of the partial periods start to influence the average. It happens on the lowest end of the spectrum.

My gut feeling is the exponential decay has the same problem, probably tunable by Ki for the expense of return to zero time, when the signal is removed.

To address the low frequency accuracy concerns, I would experiment with reducing the sampling rate, if the signal is periodic and not much spectral power over let's say fsample/200. This is where autocorrelation and/or FFT comes in. Luckily, it's not much trouble to simulate in a Jupyter notebook.

RE: Algo for rms computation?

ggabe — Wed, 19 Jul 2023 17:51:59 GMT

Yes, it is interesting. TI is selling the EVB for $16 direct. The part is very much a new item, TI is not sampling it yet. The accelerator is cool, but not as advanced as the MSP430's LEA.
The benefit for me is no need for noisy SPI bus between ADC and CPU, and I can treat the MCU, once programmed, as a single part RMS converter.

RE: Algo for rms computation?

scottiebabe — Wed, 19 Jul 2023 16:36:22 GMT

Interesting chip!

I didn't see the cycle counts for the math co-processor but it looks interesting.

RE: Algo for rms computation?

shabaz — Wed, 19 Jul 2023 15:59:50 GMT

It sounds like you're trying to measure frequency, although I wasn't sure why. All the decent methods I can think of for measuring frequency would take time to compute : ( For instance by first getting the highest amplitude frequency bucket, and then sweeping inside that bucket using an algorithm.

Unrelated, I was thinking that it could be possible to make a simple true RMS meter (nowhere near your desired spec) by using a cheap DSP module. There's a basic example here (Example 7):

Wave Miner: 10 Experiments with a Pi Digital Signal Processor (DSP)

It could be completely standalone with that chip incidentally, if the web interface were replaced with a panel meter or moving-coil meter (i.e. all the code residing in the DSP chip). Admittedly very crude, but maybe interesting for those who don't have such a feature in their multimeter.

Also, the measurement bandwidth could be selected by buttons instead of the web interface too (not sure of the use-case, I only did that feature because it was easy in the DSP).

RE: Algo for rms computation?

michaelkellett — Wed, 19 Jul 2023 09:17:01 GMT

What's wrong with:

sample (at 500kHz) s

square (at 500kHz) sq = s * s

mean (at 500kHz) m = m + ( (sq - m) / Ki)

square root (at read out rate) rms = m ^ 0.5

Division by a constant can be done by multiplication by a constant and a shift operation.

So you need 3 multiplies, 1 add, 1 subtract and 1 shift at sample speed, and the square root at read out speed.

RE: Algo for rms computation?

ggabe — Wed, 19 Jul 2023 08:35:17 GMT

It turns out autocorrelation can be easily calculated by FFT/IFFT, per Wiener-Khinchin. I’m onto something!

RE: Algo for rms computation?

ggabe — Wed, 19 Jul 2023 07:31:24 GMT

After a little digging, I'm to do autocorrelation and finding the peaks. Would autocorrelation be as good use of the CPU resources as FFT?

RE: good FFT library for a non-ARM microcontroller

ggabe — Tue, 18 Jul 2023 06:22:13 GMT

KissFFT: You can choose fixed or float data type: https://github.com/mborgerding/kissfft

good FFT library for a non-ARM microcontroller

Jan Cumps — Sun, 16 Jul 2023 19:03:47 GMT

I'm planning to make an FFT project for a Renesas RX microcontroller. Renesas provides a binary lib that works with their proprietary toolchain. It doesn't support GNU/GCC.

Do you know good C or C++ microcontroller-scale libraries that would be portable to another platform? Preferably one you have good experience with.

I've done this before for the ARM CMSIS DSP FFT lib, together with [mention:a38610f314514468a980d9a30797642d:e9ed411860ed4f2ba0265705b8793d05] . But that was for a TI Hercules, an ARM controller.
The RX platform that I'm targeting isn't ARM.

If you 've used a good library that you think is portable, let me know....

RE: good FFT library for a non-ARM microcontroller

shabaz — Sun, 16 Jul 2023 22:18:48 GMT

Hi Jan,

I don't know of anything either, like you I've only used the ARM version. I too would be interested to know of a decent library.

If you don't care about efficiency (e.g. for slower sample rate applications) then I found this online for FFT computation:

https://lloydrochester.com/post/c/example-fft/#c-implementation-of-the-fft

It uses floats, so completely inefficient, but maybe not bad for an experiment, and likely portable. Not everything needs to be speedy, maybe accuracy is needed instead! It seems to work (I checked the Test 2 test vector and result using MATLAB and it was identical).

It also computes complex FFT but the imaginary portion could be set to zero.

The code at that web link does work but needed a couple of very minor tweaks in the include file and makefile. If you want to use it then I've placed the code that built for me (on Linux PC) in the FFT tar file here.

What is the difference between the two https://www.element14.com/community/docs/DOC-87009 and. https://www.element14.com/community/docs/DOC-40513

arjun619 — Fri, 03 Nov 2017 06:30:44 GMT

What is the difference between the two https://www.element14.com/community/docs/DOC-87009 and. https://www.element14.com/community/docs/DOC-40513

RE: 450MHz Shark DSP Dev-kits

edsonbrusque — Tue, 20 Dec 2016 16:20:06 GMT

Hello Linas Karpavicius!

I'm starting a project with SHARC and would like to buy this board.

Please, email me at edsonbrusque (at) gmail (dot) com.

Thank you!

RE: 450MHz Shark DSP Dev-kits

Former Member — Sun, 06 Mar 2016 21:08:52 GMT

do you have a datasheet, manual or something like that?

Is it available jet, and what would be the price?

Ivica

ivica _at _tsbest _dot _net

Arduino + Audio DSP = Aida DSP

max.payne86 — Wed, 16 Dec 2015 15:51:08 GMT

Hi,

Aida DSP is a solution

for starting doing audio dsp projects faster.

https://github.com/AidaDSP/AidaDSP/wiki

during project developement I focused on available applications

so you'll find a lot of open source examples

ready to run on the Aida DSP board.

A library for controlling DSP in real time with Arduino

is available, on github repo.

[View:/resized-image/__size/620x325/__key/communityserver-discussions-components-files/10/3264.contentimage_5F00_64763.jpg:620:325]

If you are interested, contact us

max@aidadsp.com

Thank you

Filter IC sample rate vs. cutoff frequency

ocwo92 — Wed, 02 Dec 2015 10:01:05 GMT

I'm looking at the LTC1064 and its family members of low pass filters and the datasheets confuse me.

On most of these ICs, you set the cutoff frequency by selecting a clock frequency. According to the datasheets, most of the ICs now sample the signal at a sample rate of twice the cutoff frequency, i.e., at the Nyquist limit, to avoid aliasing.

To me this seems to defeat the very purpose of the low-pass filter. The purpose of low-pass filtering a signal prior to sampling it is to enable us to safely use a sample rate at the Nyquist rate without risking aliasing(*). However, by sampling first and filtering afterwards, aliasing will almost certainly occur.

What am I missing?

(*) Nit-picking: yes, I am aware at the Nyquist rate you will incur some aliasing unless the signal is perfectly band-limited to half the Nyquist frequency so in practice either a lower cut-off frequency or a higher sampling rate should be selected.

RE: Filter IC sample rate vs. cutoff frequency

shabaz — Wed, 02 Dec 2015 15:41:56 GMT

I see. Yes, it will be a small fraction, I've not checked the datasheet in detail so it could be ambiguous. Anyway we got there in the end, glad it's all sorted.

RE: Filter IC sample rate vs. cutoff frequency

ocwo92 — Wed, 02 Dec 2015 15:37:05 GMT

Shabaz,

With respect you yourself said:

But... since the filter IC's cut-off frequency is always half of the IC's sampling frequency

That was of course referring to what the data sheet seemed to say about the cut-off frequency and its sampling frequency on this particular IC (hence the reference to the filter IC's behavior). I think I made it quite clear that this would render the IC rather ineffective.

Right, exactly that - in the very first response it was stated that the cut-off frequency would be a tiny fraction of the clock frequency.

Yes, but that wasn't really my question. If the cut-off frequency is a small fraction of the sample rate, then everything is indeed fine. I was merely asking what the datasheet could possibly mean because it seemed to say otherwise.

RE: Filter IC sample rate vs. cutoff frequency

shabaz — Wed, 02 Dec 2015 15:14:19 GMT

With respect you yourself said:

But... since the filter IC's cut-off frequency is always half of the IC's sampling frequency

And I specified:

Cut-off frequency != sample rate (nor half of it)

This has nothing to do with the IC - it is a standard way all switched capacitor filters behave. This is not specific to the IC.

In conclusion, I think I'll just believe the ICs are in fact sampling at a much higher rate than the cut-off frequency

Right, exactly that - in the very first response it was stated that the cut-off frequency would be a tiny fraction of the clock frequency.

The clock frequency is the switching frequency of the integrated circuit, and is the 'f' in the formula on the Wikipedia page, and the LT.. datasheet will

provide the exact divisor for you to determine the cut-off frequency.

RE: Filter IC sample rate vs. cutoff frequency

ocwo92 — Wed, 02 Dec 2015 15:04:28 GMT

Shabaz,

Cut-off frequency != sample rate (nor half of it)

and

Cut-off frequency != clock frequency (nor half of it)

I know that perfectly, and I don't see why you think I've said otherwise. I've actually designed and built analog and digital filters before; it's just the LTC chips that I haven't played with before.

Reading the datasheets for some of the other ICs in the family actually makes me somewhat confident that I must have misunderstood the first datasheet that I read (unfortunately I don't recall which one that was) because they don't discuss any sample rate being twice the cut-off frequency at all.

However, the datasheet I first read did seem to suggest that if I selected the clock speed for a particular cut-off frequency (so that the clock speed is indeed many times higher than the cut-off frequency), somehow the IC would be sampling at a frequency of just twice the cut-off frequency. It was just te latter that didn't make sense to me.

In conclusion, I think I'll just believe the ICs are in fact sampling at a much higher rate than the cut-off frequency, as this is the only thing that makes sense to me.