Blog - All Comments

RE: Bringing Up a Kintex-7 Board: A Practical Walk-Through from Power-On to First Bitstream

spinden — Wed, 21 Oct 2026 12:10:52 GMT

Nice job! Thanks for sharing

RE: Tang Nano Series and Gowin FPGAs for Beginners: A Practical Guide, Part 1

shabaz — Sun, 18 Oct 2026 15:06:01 GMT

One thing I don't like is that there's no practical way to feed in power to these boards other than via USB-C.

For instance on the Tang Nano 20k, VBUS from the USB-C connector goes through an 0805-sized fuse to 5V.

That 5V supply rail then goes to a header pin (which I wished to use to feed in power) but the rail is also all over the place on the board (there are a lot of voltage regulators). I decided to see what happens if I remove that fuse on the Tang Nano 20k and change it to a diode.

There are some extremely tiny parts nearby (0201 perhaps), so I covered them with Kapton tape:

The desoldering still wasn't easy. The smallest diode I had was PMEG2005EGW (Schottky, 500mA) so I went with that.. not enough space to solder it on both pads so there's a wire bridge. The leftmost PCB pad needs to go to the anode.

Finally a drop of glue using the end of a toothpick to dispense it:

It seems to work for now, but I don't know if it will impact some projects or not.

RE: Tang Nano 9k: Using Internal PSRAM in Gowin FPGAs

shabaz — Tue, 13 Oct 2026 14:42:39 GMT

One thing I'm having difficulty with;

I've successfully managed to output from PSRAM to a serial bitstream (green), but this time based on an external clock (yellow). In other words, the serial bitstream rate is dependent on the external clock.

However, I want data on _both_ clock edges (as you can see, the green output changes on falling and rising clock edges). That works, but I cannot seem to make the Gowin software treat the yellow signal as a clock, it treats it as a normal logic signal, hence timing could potentially break. The warning I get is "Can't calculate clock's relationship" (between the clock being used in the process which is the 40.5MHz clock as mentioned in the blog post, and the external clock shown in yellow in the 'scope trace. I have for sure attached that yellow signal to a pin on the FPGA which supports clocks.

Testbed photo for those interested.. I was able to get UART working and use that to fill up the PSRAM, and then the PSRAM data is played out as shown in the green trace above. I'm using a low-cost Owon signal generator to create that external clock, and a Kingst logic analyzer to capture the clock and data.

I only had 10-way header/socket pins unfortunately. Also, I avoided blocking the TFT connector area in case I ever purchase that.

RE: Tang Nano 9k: Using Internal PSRAM in Gowin FPGAs

shabaz — Sun, 11 Oct 2026 06:00:11 GMT

There's an "oscilloscope" feature with the Gowin software, for live troubleshooting. It instruments the project with attachments to all the signals of interest, so that when the FPGA runs, it sends those signals to the PC.

While their app works, their display update rate was quite low, so I spent some time with the AI reverse-engineering the protocol, and came up with a nicer-looking app, although not as feature-rich as as the Gowin one.. but a lot faster though. I'll create a GitHub repo for this when it's got a few more features (like markers for instance). I copied some ideas from Rohde&Schwarz 'scope displays, and have a similar history playback feature.

This is the Gowin software (this is in a "Lite" setting, there is another mode with a lot more features like triggered captures, but I've not tried that:

RE: Tang Nano 9k: Using Internal PSRAM in Gowin FPGAs

michaelkellett — Fri, 09 Oct 2026 08:54:49 GMT

Great blog Shabaz.

I've installed but not used the latest Gowin tools so nice to see what they do.

Where are you getting the block diagrams - is that an output from the Gowin tools ?

RE: Tang Nano 9k: Using Internal PSRAM in Gowin FPGAs

dang74 — Thu, 08 Oct 2026 23:58:54 GMT

Thanks [mention:b0bc65b9ecdc4307bd967592f00e340a:e9ed411860ed4f2ba0265705b8793d05] the Gowin Designer software looks pretty good. I am glad that the design process isn't limited to command line.

RE: High Speed Fiber Optic Data Transmission

DAB — Tue, 06 Oct 2026 19:05:15 GMT

Very good post.

RE: Tang Nano Series and Gowin FPGAs for Beginners: A Practical Guide, Part 1

DAB — Tue, 06 Oct 2026 19:00:18 GMT

Very good overview of the devices.

I look forward to seeing how you make them into something useful.

RE: Tang Nano Series and Gowin FPGAs for Beginners: A Practical Guide, Part 1

dang74 — Mon, 05 Oct 2026 17:32:40 GMT

Thanks [mention:b0bc65b9ecdc4307bd967592f00e340a:e9ed411860ed4f2ba0265705b8793d05] I have the both 1k and 9k boards. Sadly, I have not used them yet... but you wrote a nice overview and perhaps that will serve as an inspiration.

RE: Tang Nano Series and Gowin FPGAs for Beginners: A Practical Guide, Part 1

michaelkellett — Mon, 05 Oct 2026 09:30:18 GMT

Thanks for this - I look forward to seeing what you make it do !

The Tang boards are pretty good value and the Gowin FPGAs are getting quite good. I have some Tang bits to play with but all my time is being used up on an Artix 7 project at the moment.

Gowin say that they have a simulator:

RE: Tang Nano Series and Gowin FPGAs for Beginners: A Practical Guide, Part 1

jc2048 — Mon, 05 Oct 2026 09:10:50 GMT

Thanks. A useful introduction to the Tang boards and their Gowin FPGAs.

They all look useful for different kinds of things. The 1k for learning the fundamentals of basic logic design, the 9k would lend itself nicely to experimenting with simple soft processors, and the 20k for more ambious stuff - you could do a whole music synthesizer with that one.

Presumably, the separate clock synthesizer chip is there for the specialised clocks you need for audio and video work.

RE: Tang Nano Series and Gowin FPGAs for Beginners: A Practical Guide, Part 1

kk99 — Mon, 05 Oct 2026 07:33:22 GMT

I haven’t used an FPGA with Gowin yet. I found a nice, minimalist and inexpensive board with an Artix-7:

RE: Tang Nano Series and Gowin FPGAs for Beginners: A Practical Guide, Part 1

embeddedguy — Mon, 05 Oct 2026 06:11:30 GMT

Nice information. I think Pi Pico PIO peripheral would have some limitations compared to FPGA. Otherwise, I would love to work on PIO using C/C++ to avoid learning VHDL or similar. [emoticon:c4563cd7d5574777a71c318021cbbcc8]

RE: High Speed Fiber Optic Data Transmission

Qbit — Sat, 19 Sep 2026 15:30:41 GMT

Excited to see!

RE: Hardware Accelerator for Hyperspectral Image Processing

DAB — Tue, 14 Jul 2026 20:54:21 GMT

I worked on an extensive hyperspectral analysis station before I retired.

We did a lot of analysis on computer architectures available to process the data and create hyperspectral vectors for locating targets of interest in all of the data.

We had a lot of technics for simplifying the data using fairly strait forward math.

Your approach looks interesting for certain types of data operations.

Send me your link so I can look at it in more detail.