<?xml-stylesheet type="text/xsl" href="https://community.element14.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>Ultra96-V2 ON Semiconductor Dual Camera Mezzanine hardware build instructions</title><link>/technologies/fpga-group/b/blog/posts/ultra96-v2-on-semiconductor-dual-camera-mezzanine-hardware-build-instructions</link><description>I&amp;#39;m going to borrow heavily from my colleague Tom Curran and his excellent HDL howto blog ( Avnet HDL git HOWTO (Vivado 2020.1 and earlier) ). I highly recommend reading through that blog before continuing. I will modify it as needed to help you build</description><dc:language>en-US</dc:language><generator>Telligent Community 12</generator><item><title>RE: Ultra96-V2 ON Semiconductor Dual Camera Mezzanine hardware build instructions</title><link>https://community.element14.com/technologies/fpga-group/b/blog/posts/ultra96-v2-on-semiconductor-dual-camera-mezzanine-hardware-build-instructions</link><pubDate>Mon, 11 Mar 2024 20:38:46 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:97766aa1-29b8-4ab5-93e9-01455a279653</guid><dc:creator>nbaldy5</dc:creator><slash:comments>0</slash:comments><description>&lt;p&gt;Does not yet support anything beyond 2022.2 based on the error messages I got.&lt;/p&gt;
&lt;p&gt;[embed:dc8ab71f-3b98-42d9-b0f6-e21e02a0f8e2:708c4e19-d73c-4427-adda-7e5bf4bd8188:type=text&amp;text=vivado%20-mode%20batch%20-source%20.%2Fmake_u96v2_sbc_dualcam.tcl]&lt;/p&gt;&lt;img src="https://community.element14.com/aggbug?PostID=10501&amp;AppID=19&amp;AppType=Weblog&amp;ContentType=0" width="1" height="1"&gt;</description></item><item><title>RE: Ultra96-V2 ON Semiconductor Dual Camera Mezzanine hardware build instructions</title><link>https://community.element14.com/technologies/fpga-group/b/blog/posts/ultra96-v2-on-semiconductor-dual-camera-mezzanine-hardware-build-instructions</link><pubDate>Wed, 17 Mar 2021 22:49:33 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:97766aa1-29b8-4ab5-93e9-01455a279653</guid><dc:creator>jomoenginer</dc:creator><slash:comments>1</slash:comments><description>&lt;p&gt;I was able to get through most of the build with this with the changes to the VM I posted in the PetaLinux post, but the build still fails for the issue below:&lt;/p&gt;&lt;p&gt;&amp;nbsp;&lt;/p&gt;&lt;p&gt;Perhaps I need to add the license for the &amp;#39;xczu3eg&amp;#39; to my Xilinx license manager.&lt;/p&gt;&lt;p&gt;&amp;nbsp;&lt;/p&gt;&lt;p&gt;[embed:dc8ab71f-3b98-42d9-b0f6-e21e02a0f8e2:3ef06e6b-9b7d-4651-b12d-db8be7f5e991:type=text&amp;amp;text=INFO%3A+%5BHsi+55-2053%5D+elapsed+time+for+repository+%28%2Ftools%2FXilinx%2FVivado%2F2020.1%2Fdata%2Fembeddedsw%29+loading+2+seconds%0AINFO%3A+%5BProject+1-1042%5D+Successfully+generated+hpfm+file%0Awrite_project_tcl%3A+Time+%28s%29%3A+cpu+%3D+00%3A00%3A18+%3B+elapsed+%3D+00%3A00%3A44+.+Memory+%28MB%29%3A+peak+%3D+4159.301+%3B+gain+%3D+0.000+%3B+free+physical+%3D+4348+%3B+free+virtual+%3D+11916%0ACommand%3A+write_bitstream+-force+%2Fhome%2Fvitis20201%2Fgit%2Favnet%2Fhdl%2FScripts%2F.Xil%2FVivado-3330-vitis20201-VirtualBox%2Fxsa%2FULTRA96V2.bit%0AAttempting+to+get+a+license+for+feature+%27Implementation%27+and%2For+device+%27xczu3eg%27%0AINFO%3A+%5BCommon+17-349%5D+Got+license+for+feature+%27Implementation%27+and%2For+device+%27xczu3eg%27%0AINFO%3A+%5BCommon+17-83%5D+Releasing+license%3A+Implementation%0A91+Infos%2C+98+Warnings%2C+1+Critical+Warnings+and+1+Errors+encountered.%0Awrite_bitstream+failed%0AERROR%3A+%5BCommon+17-69%5D+Command+failed%3A+This+design+contains+one+or+more+cells+for+which+bitstream+generation+is+not+permitted%3A%0AULTRA96V2_i%2FLIVE_VIDEO_DP%2Fv_osd_0%2FU0+%28%3Cencrypted+cellview%3E%29%0AIf+a+new+IP+Core+license+was+added%2C+in+order+for+the+new+license+to+be+picked+up%2C+the+current+netlist+needs+to+be+updated+by+resetting+and+re-generating+the+IP+output+products+before+bitstream+generation.%0AERROR%3A+%5BCommon+17-69%5D+Command+failed%3A+ERROR%3A+%5BCommon+17-69%5D+Command+failed%3A+This+design+contains+one+or+more+cells+for+which+bitstream+generation+is+not+permitted%3A%0AULTRA96V2_i%2FLIVE_VIDEO_DP%2Fv_osd_0%2FU0+%28%3Cencrypted+cellview%3E%29%0AIf+a+new+IP+Core+license+was+added%2C+in+order+for+the+new+license+to+be+picked+up%2C+the+current+netlist+needs+to+be+updated+by+resetting+and+re-generating+the+IP+output+products+before+bitstream+generation.%0A%0A%0A++++while+executing%0A%22source+.%2FProjectScripts%2F%24project.tcl+-notrace%22%0A++++%28%22ULTRA96V2%22+arm+line+2%29%0A++++invoked+from+within%0A%22switch+-nocase+%24board+%7B%0A+++PZ7015_FMCCC+++++++++++++++-%0A+++PZ7030_FMCCC+++++++++++++++-%0A+++PZ7010_FMC2++++++++++++++++-%0A+++PZ7020_FMC2++++++++++++++++...%22%0A++++%28file+%22.%2Fmake.tcl%22+line+361%29%0A%0A++++while+executing%0A%22source+.%2Fmake.tcl+-notrace%22%0A++++%28file+%22.%2Fmake_ultra96v2_dualcam.tcl%22+line+69%29%0AINFO%3A+%5BCommon+17-206%5D+Exiting+Vivado+at+Wed+Mar+17+14%3A43%3A11+2021...]&lt;/p&gt;&lt;div&gt;&lt;/div&gt;&lt;img src="https://community.element14.com/aggbug?PostID=10501&amp;AppID=19&amp;AppType=Weblog&amp;ContentType=0" width="1" height="1"&gt;</description></item><item><title>RE: Ultra96-V2 ON Semiconductor Dual Camera Mezzanine hardware build instructions</title><link>https://community.element14.com/technologies/fpga-group/b/blog/posts/ultra96-v2-on-semiconductor-dual-camera-mezzanine-hardware-build-instructions</link><pubDate>Wed, 17 Mar 2021 17:52:22 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:97766aa1-29b8-4ab5-93e9-01455a279653</guid><dc:creator>jomoenginer</dc:creator><slash:comments>0</slash:comments><description>&lt;p&gt;Note:&lt;/p&gt;&lt;p&gt;&amp;nbsp;&lt;/p&gt;&lt;p&gt;The following line is not correct:&lt;/p&gt;&lt;p&gt;[embed:dc8ab71f-3b98-42d9-b0f6-e21e02a0f8e2:3ef06e6b-9b7d-4651-b12d-db8be7f5e991:type=text&amp;amp;text=%24+source+%2Ftools%2Fpetalinuxv2020.1-final%2Fsettings.sh+]&lt;/p&gt;&lt;div&gt;&lt;/div&gt;&lt;p&gt;&amp;nbsp;&lt;/p&gt;&lt;p&gt;This should be:&lt;/p&gt;&lt;p&gt;[embed:dc8ab71f-3b98-42d9-b0f6-e21e02a0f8e2:3ef06e6b-9b7d-4651-b12d-db8be7f5e991:type=text&amp;amp;text=%24+source+%2Ftools%2Fpetalinux-v2020.1-final%2Fsettings.sh]&lt;/p&gt;&lt;div&gt;&lt;/div&gt;&lt;img src="https://community.element14.com/aggbug?PostID=10501&amp;AppID=19&amp;AppType=Weblog&amp;ContentType=0" width="1" height="1"&gt;</description></item><item><title>RE: Ultra96-V2 ON Semiconductor Dual Camera Mezzanine hardware build instructions</title><link>https://community.element14.com/technologies/fpga-group/b/blog/posts/ultra96-v2-on-semiconductor-dual-camera-mezzanine-hardware-build-instructions</link><pubDate>Sun, 17 Jan 2021 07:50:57 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:97766aa1-29b8-4ab5-93e9-01455a279653</guid><dc:creator>saadtiwana_int</dc:creator><slash:comments>1</slash:comments><description>&lt;p&gt;Hi Chris,&lt;/p&gt;&lt;p&gt;&lt;br /&gt;Thanks for sharing this. I am looking forward to your post (as you mentioned in your last post) regarding building the petalinux side of it. Any idea when?&lt;/p&gt;&lt;p&gt;&amp;nbsp;&lt;/p&gt;&lt;p&gt;Thanks and Regards,&lt;br /&gt;Saad&lt;/p&gt;&lt;p&gt;&amp;nbsp;&lt;/p&gt;&lt;p&gt;&amp;nbsp;&lt;/p&gt;&lt;p&gt;UPDATE: I found it already; Pls disregard my question &lt;span&gt;[View:/resized-image/__size/16x16/__key/commentfiles/f7d226abd59f475c9d224a79e3f0ec07-97766aa1-29b8-4ab5-93e9-01455a279653/contentimage_5F00_1.png:16:16]&lt;/span&gt;. Thanks&lt;/p&gt;&lt;p&gt;&lt;a class="jive-link-blog-small" href="/technologies/fpga-group/b/blog/posts/ultra96-v2-dual-camera-mezzanine-petalinux-build-instructions"&gt;Ultra96-V2 Dual Camera Mezzanine Petalinux Build Instructions&lt;/a&gt; &lt;/p&gt;&lt;img src="https://community.element14.com/aggbug?PostID=10501&amp;AppID=19&amp;AppType=Weblog&amp;ContentType=0" width="1" height="1"&gt;</description></item><item><title>RE: Ultra96-V2 ON Semiconductor Dual Camera Mezzanine hardware build instructions</title><link>https://community.element14.com/technologies/fpga-group/b/blog/posts/ultra96-v2-on-semiconductor-dual-camera-mezzanine-hardware-build-instructions</link><pubDate>Thu, 17 Dec 2020 15:59:10 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:97766aa1-29b8-4ab5-93e9-01455a279653</guid><dc:creator>json</dc:creator><slash:comments>0</slash:comments><description>&lt;p&gt;grt to see this&lt;/p&gt;&lt;img src="https://community.element14.com/aggbug?PostID=10501&amp;AppID=19&amp;AppType=Weblog&amp;ContentType=0" width="1" height="1"&gt;</description></item></channel></rss>