/technologies/fpga-group/b/blog/posts/the-art-of-fpga-design-season-2---post-18Multichannel Symmetric FIRs In the last two posts we have considered the case when the FPGA clock frequency is faster than the FIR sample rate. The ratio between the system clock and the data sample rate is called the overclocking factor M. We h...en-USTelligent Community 12