Learning Xilinx Zynq: port a Spartan 6 PWM example to Pynq

RE: Learning Xilinx Zynq: port a Spartan 6 PWM example to Pynq

Jan Cumps — Tue, 06 Jul 2021 20:13:57 GMT

If I use 6 bits for the counter, with the 100 MHz FPGA clock that I'm using:

it would give me 64 steps. Good enough for smooth transition between 0 and 100%
the frequency would be 100 MHz / 64 = 1.5 MHz
the deadband resolution would still be one clock tick (resolution of the dead time is depending on the clock frequency, not on the duty cycle bit size) , 1/100 MHz = 10 ns

That would be an ideal signal to control GaN FETs. They like to be in the +- 1 MHz range, and the LMG5200 half bridge I have needs 9 ns of deadband.

RE: Learning Xilinx Zynq: port a Spartan 6 PWM example to Pynq

cstanton — Mon, 14 Jun 2021 14:37:47 GMT

This inspires me to spend more time with an oscilloscope...

RE: Learning Xilinx Zynq: port a Spartan 6 PWM example to Pynq

neuromodulator — Tue, 08 Jun 2021 16:57:31 GMT

Interesting! Some time ago I was looking for a way to transfer data from PS to the PL, and it looked to me like AXI was the way to do that. Didn't know you could also do it through GPIO. How fast can you switch these GPIOs?

RE: Learning Xilinx Zynq: port a Spartan 6 PWM example to Pynq

Andrew J — Tue, 08 Jun 2021 08:48:40 GMT

Very interesting Jan. FPGA is something I want to start looking at by the end of the year. Once I can get house renovation works out of the way!

RE: Learning Xilinx Zynq: port a Spartan 6 PWM example to Pynq

Jan Cumps — Mon, 07 Jun 2021 20:03:26 GMT

Some animation: 50% duty, then looping through 0, 8 and 15 cycles of dead band

[embed:dc8ab71f-3b98-42d9-b0f6-e21e02a0f8e2:3ef06e6b-9b7d-4651-b12d-db8be7f5e991:type=python&text=from+time+import+sleep%0Abit_0.write%281%29%0Abit_1.write%281%29%0Abit_2.write%281%29%0Abit_3.write%281%29%0Abit_4.write%281%29%0Abit_5.write%281%29%0Abit_6.write%281%29%0Abit_7.write%280%29%0A%0Awhile+1%3A%0A++++++++bit_8.write%280%29%0A++++++++bit_9.write%280%29%0A++++++++bit_10.write%280%29%0A++++++++bit_11.write%280%29++++%0A++++++++sleep%281%29%0A++++++++bit_8.write%280%29%0A++++++++bit_9.write%280%29%0A++++++++bit_10.write%281%29%0A++++++++bit_11.write%280%29++++%0A++++++++sleep%281%29%0A++++++++bit_8.write%281%29%0A++++++++bit_9.write%281%29%0A++++++++bit_10.write%281%29%0A++++++++bit_11.write%281%29++++%0A++++++++sleep%281%29]

[View:/resized-image/__size/372x439/__key/commentfiles/f7d226abd59f475c9d224a79e3f0ec07-b372f53a-71cb-4476-9f65-ea935e407b8b/contentimage_5F00_208417.gif:372:439]