RE: XXICC (21st Century Co-design) release 0.0q

johnbeetem — Mon, 17 Aug 2015 19:41:20 GMT

XXICC Issue #27

There's a GCHD bug in XXICC 0.0p and 0.0q involving conditional updates of registers. Here's some sample code that exposes the bug:

if !reset then {s3 = s2 = FALSE; s1 = s0 = TRUE} else

if clk rises then

{ // On rising clk, increment s3-s0 if "up", otherwise hold s3-s0.

s3 ^= up & s2 & s1 & s0;

s2 ^= up & s1 & s0;

s1 ^= up & s0;

s0 ^= up;

};

Compiling this produces the message "Register update must follow standard form" on the line "s1 ^= up & s0". If you try recompiling GCHD it goes into an infinite loop.

The problem is that XXICC 0.0p and 0.0q do not like an expression like "!reset" as an if-then-else condition. GCHD works fine if you first assign "!reset" to another net and then use that net name in the if-then-else, so use that work-around for now.

The bug was introduced in XXICC 0.0p when I changed NOPSAs to LOADSAs (see the 0.0p release notes). The bug fix was easy and will be incorporated in XXICC 0.0r.