Use the ZYNQ XADC with DMA part 1: bare metal

RE: Use the ZYNQ XADC with DMA part 1: bare metal

ftm_mrbs — Sat, 03 Aug 2024 03:48:10 GMT

Hello, can you explain how 9.231 mV translates to the hex numbers shown in memory? if it's a dc value, why are there variating numbers?

RE: Use the ZYNQ XADC with DMA part 1: bare metal

wwkk898 — Wed, 06 Mar 2024 09:09:19 GMT

Hi. I'm an undergraduate new to fpga. I use a pynq z2 board. But my professor told me to make adc using this board, so I came across this post.
I've been following this post from the beginning, and even if I set up the processor system the same as the post, the ip blocks won't be created like the picture in the tutorial. I've seen the tutorial in adam, but it's the same. Is there a more detailed tutorial on how to make an ip block diagram? Thank you.

RE: Use the ZYNQ XADC with DMA part 1: bare metal

Jan Cumps — Fri, 11 Feb 2022 10:13:41 GMT

There is an issue with the 1st 12 samples. Check this discussion on the PYNQ community:

discuss.pynq.io/.../3661

RE: Use the ZYNQ XADC with DMA part 1: bare metal

Jan Cumps — Sat, 04 Dec 2021 10:46:43 GMT

I'm going to try and build a Linux executable in C for this now.

For that, I need to generate a Pentalinux sysroot. I found instructions on how to do that with Windows Linux Subsystem.
I'm going to try that. My Vitis development PC is a Windows 10. A good time to learn both WLS and pentalinux build.

RE: Use the ZYNQ XADC with DMA part 1: bare metal

Jan Cumps — Tue, 30 Nov 2021 14:55:45 GMT

Preview of how it looks with a Jupyter notebook in PYNQ:

16 kHz, sinus between 148 and 554 mV