<?xml-stylesheet type="text/xsl" href="https://community.element14.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>Is ECC Capability with DDR Memory a Big Deal?</title><link>/technologies/fpga-group/b/blog/posts/is-ecc-capability-with-ddr-memory-a-big-deal</link><description>I&amp;#39;ve been studying Error Correcting Code (ECC) capability lately, specifically as it relates to Xilinx.

What is ECC?
Definition: Error correction code (ECC) checks read or transmitted data for errors and corrects them as soon as they are found....</description><dc:language>en-US</dc:language><generator>Telligent Community 12</generator></channel></rss>