/technologies/fpga-group/b/blog/posts/first-arty-s7-project-prior-experience-with-spartan-6-and-vivadoI&#39;m a late arriver to the 7 Ways to Leave Your Spartan-6 FPGA program. My device arrived today (June 23). I prepared a first project yesterday. I have prior knowledge with Spartan-6 and ISE, and I know Vivado. I used the Vitis / Vivado toolchain...en-USTelligent Community 12https://community.element14.com/technologies/fpga-group/b/blog/posts/first-arty-s7-project-prior-experience-with-spartan-6-and-vivadoThu, 23 Jun 2022 18:17:57 GMT93d5dcb4-84c2-446f-b2cb-99731719e767:478a94be-c2d3-47cd-86be-dca9a85375e3DAB0<p>Nice post Jan.</p><img src="https://community.element14.com/aggbug?PostID=23848&AppID=19&AppType=Weblog&ContentType=0" width="1" height="1">https://community.element14.com/technologies/fpga-group/b/blog/posts/first-arty-s7-project-prior-experience-with-spartan-6-and-vivadoThu, 23 Jun 2022 09:16:05 GMT93d5dcb4-84c2-446f-b2cb-99731719e767:478a94be-c2d3-47cd-86be-dca9a85375e3javagoza1<p><a class="internal-link view-user-profile" href="/members/jancumps"> Jan Cumps</a>, welcome to the &quot;7 Ways to Leave Your Spartan-6 program&quot;! Even if you joined quite late you already know Vivado and have been able to start working with the board immediately.&nbsp;Good start.</p> <p>I think it is easy to enable a second clock with the clock wizard instead of using the clock divider.&nbsp;The result will be the same but the diagram is simpler, I don&#39;t know if it&#39;s easier to understand.</p><img src="https://community.element14.com/aggbug?PostID=23848&AppID=19&AppType=Weblog&ContentType=0" width="1" height="1">