/technologies/fpga-group/b/blog/posts/getting-started-7-ways-to-leave-your-spartan-6-fpgaIntroduction:In this blog, I will walk through the steps to create our first project on the Arty S7-50 FPGA board. I received this board from E14 for the 7 Ways to Leave your Spartan-6 program. In this blog, I will do the first start of the board anden-USTelligent Community 12https://community.element14.com/technologies/fpga-group/b/blog/posts/getting-started-7-ways-to-leave-your-spartan-6-fpgaTue, 19 Jul 2022 16:27:36 GMT93d5dcb4-84c2-446f-b2cb-99731719e767:2db07083-869f-48a0-b5d3-b388aec8b288rsjawale241<p>Generally, all FPGAs are volatile. Once you disconnect it from power, it loses the programmed bitstream. You can store your bitstream in the EEPROM or any other type of memory present on the board such that the FPGA will load the bitstream from memory on power up. </p> <p>A good example of this is the pre-loaded LEDs flashy demo.</p><img src="https://community.element14.com/aggbug?PostID=23999&AppID=19&AppType=Weblog&ContentType=0" width="1" height="1">