<?xml-stylesheet type="text/xsl" href="https://community.element14.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>7 Ways to Leave Your Spartan-6, what have I learned</title><link>/technologies/fpga-group/b/blog/posts/7-ways-to-leave-your-spartan-6-what-have-i-learned</link><description>I started working on my project ( post 1 and post 2 ) about a month ago. I had a bit of experience both with Xilinx/Amd Zynq SoCs as well as Altera/Intel Cyclone V SoCs. While working on the 7 Ways to Leave Your Spartan-6, I was able to explore the Spa</description><dc:language>en-US</dc:language><generator>Telligent Community 12</generator></channel></rss>