/technologies/fpga-group/b/blog/posts/image-processing-box-blur-on-arty-s7-50-7-ways-to-leave-your-spartan-6-fpga-projectIntroduction:After learning about various things that can be done on Arty S7-50, I think I am now ready to put all my learnings together in one project.In this blog, I will try to implement a basic image processing algorithm (blurring an image) on then-USTelligent Community 12https://community.element14.com/technologies/fpga-group/b/blog/posts/image-processing-box-blur-on-arty-s7-50-7-ways-to-leave-your-spartan-6-fpga-projectThu, 04 Aug 2022 11:02:26 GMT93d5dcb4-84c2-446f-b2cb-99731719e767:67382aca-e83d-460b-b585-4570ed1d9b5fjavagoza2<p><span>The Vivado Design Suite also supports a MEM File format for memory initialization as described at&nbsp;the</span>&nbsp;Vivado Design Suite User Guide</p> <p><a href="https://docs.xilinx.com/v/u/2021.1-English/ug901-vivado-synthesis">ug901-vivado-synthesis.pdf &bull; Viewer &bull; Documentation Portal (xilinx.com)</a></p> <p>Loading Memory Contents With File I/O Tasks</p> <p>Use the $readmemb and $readmemh system tasks to initialize block memories.</p> <ul> <li>Use $readmemb for binary representation</li> <li>Use $readmemh for hexadecimal representation.</li> <li>Use index parameters to avoid behavioral conflicts between Vivado synthesis and the simulator.</li> </ul> <p>$readmemb(&quot;rams_20c.data&quot;,ram, 0, 7);</p><img src="https://community.element14.com/aggbug?PostID=24122&AppID=19&AppType=Weblog&ContentType=0" width="1" height="1">https://community.element14.com/technologies/fpga-group/b/blog/posts/image-processing-box-blur-on-arty-s7-50-7-ways-to-leave-your-spartan-6-fpga-projectWed, 03 Aug 2022 19:46:00 GMT93d5dcb4-84c2-446f-b2cb-99731719e767:67382aca-e83d-460b-b585-4570ed1d9b5fJan Cumps1<p>In this case, everything happens inside the MicroBlaze controller, doesn&#39;t it?</p><img src="https://community.element14.com/aggbug?PostID=24122&AppID=19&AppType=Weblog&ContentType=0" width="1" height="1">