<?xml-stylesheet type="text/xsl" href="https://community.element14.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>The New DSPFP32 Primitive in Versal FPGAs</title><link>/technologies/fpga-group/b/blog/posts/the-new-dspfp32-primitive-in-versal-fpgas</link><description>The New DSPFP32 Primitive in Versal FPGAs
The DSP primitive in the latest Versal FPGA family is called DSP58 and it already has a number of improvements over the latest DSP48 flavors, mainly an increase from 27x18 signed multiplier and 48-bit post ad</description><dc:language>en-US</dc:language><generator>Telligent Community 12</generator><item><title>RE: The New DSPFP32 Primitive in Versal FPGAs</title><link>https://community.element14.com/technologies/fpga-group/b/blog/posts/the-new-dspfp32-primitive-in-versal-fpgas</link><pubDate>Wed, 20 Dec 2023 17:06:57 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:5d633657-6efb-4e68-83c1-3a20b197323e</guid><dc:creator>flyingbean</dc:creator><slash:comments>0</slash:comments><description>&lt;p&gt;&amp;nbsp;Xilinx DSP primitive is an essential building block for adaptive computing.&amp;nbsp; I am starting to read your season 1&amp;amp;2 blogs regarding to use Xilinx DSP primitives for AI/HLS design now.&lt;/p&gt;&lt;img src="https://community.element14.com/aggbug?PostID=27361&amp;AppID=19&amp;AppType=Weblog&amp;ContentType=0" width="1" height="1"&gt;</description></item><item><title>RE: The New DSPFP32 Primitive in Versal FPGAs</title><link>https://community.element14.com/technologies/fpga-group/b/blog/posts/the-new-dspfp32-primitive-in-versal-fpgas</link><pubDate>Wed, 20 Dec 2023 09:02:02 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:5d633657-6efb-4e68-83c1-3a20b197323e</guid><dc:creator>javagoza</dc:creator><slash:comments>1</slash:comments><description>&lt;p&gt;This post just increased my interest in the Versal family. Let&amp;#39;s see if I have the opportunity to go deeper in a practical way in the future. Thank you, I follow your series of posts very carefully.&lt;/p&gt;&lt;img src="https://community.element14.com/aggbug?PostID=27361&amp;AppID=19&amp;AppType=Weblog&amp;ContentType=0" width="1" height="1"&gt;</description></item><item><title>RE: The New DSPFP32 Primitive in Versal FPGAs</title><link>https://community.element14.com/technologies/fpga-group/b/blog/posts/the-new-dspfp32-primitive-in-versal-fpgas</link><pubDate>Tue, 19 Dec 2023 19:58:30 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:5d633657-6efb-4e68-83c1-3a20b197323e</guid><dc:creator>DAB</dc:creator><slash:comments>0</slash:comments><description>&lt;p&gt;Interesting architecture.&lt;/p&gt;&lt;img src="https://community.element14.com/aggbug?PostID=27361&amp;AppID=19&amp;AppType=Weblog&amp;ContentType=0" width="1" height="1"&gt;</description></item></channel></rss>