<?xml-stylesheet type="text/xsl" href="https://community.element14.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>ZUBoard High Speed IO (J6) used by MIPI CSI-2 Rx IP on PL side</title><link>/technologies/fpga-group/b/blog/posts/zuboard-high-speed-io-j6-used-by-mipi-csi-2-rx</link><description>I have two questions before to purchase ZUBoard 1CG + Avnet The dual-camera mezzanine:
1) For camera image processing, can I use Xilinx DPU IP on PL side from this ZUBoard development board?
2) Is this ZUBoard development board to support M...</description><dc:language>en-US</dc:language><generator>Telligent Community 12</generator></channel></rss>