<?xml-stylesheet type="text/xsl" href="https://community.element14.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>The Art of FPGA Design Season 2 Post 21</title><link>/technologies/fpga-group/b/blog/posts/the-art-of-fpga-design-season-2-post-21</link><description>You cannot always trust AIs
I asked four major AI chat bots the same question: 
&amp;quot;What is the most efficient way to implement IIR filters? Reply in 40 words or less.&amp;quot;
Here are the responses: 
Perplexity AI:
&amp;quot;Use a cascade of second-order (bi...</description><dc:language>en-US</dc:language><generator>Telligent Community 12</generator><item><title>RE: The Art of FPGA Design Season 2 Post 21</title><link>https://community.element14.com/technologies/fpga-group/b/blog/posts/the-art-of-fpga-design-season-2-post-21</link><pubDate>Sun, 19 Apr 2026 13:31:53 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:2d5eb677-aff9-421d-a574-6bd0209ae0d3</guid><dc:creator>fpgaguru</dc:creator><slash:comments>0</slash:comments><description>&lt;p&gt;An errata for the stability condition for the second order all pass section with transfer function H(z)=(c2+c1*z^-1+z^-2)/(1+c1*z^-1+c2*z^-2), the two conditions are abs(c2)&amp;lt;1 and abs(c1)&amp;lt;1+c2, not abs(c1)&amp;lt;1 as stated in the post.&amp;nbsp;&lt;/p&gt;&lt;img src="https://community.element14.com/aggbug?PostID=29098&amp;AppID=19&amp;AppType=Weblog&amp;ContentType=0" width="1" height="1"&gt;</description></item><item><title>RE: The Art of FPGA Design Season 2 Post 21</title><link>https://community.element14.com/technologies/fpga-group/b/blog/posts/the-art-of-fpga-design-season-2-post-21</link><pubDate>Thu, 07 Aug 2025 19:26:07 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:2d5eb677-aff9-421d-a574-6bd0209ae0d3</guid><dc:creator>DAB</dc:creator><slash:comments>0</slash:comments><description>&lt;p&gt;There is no short cut to understanding how to properly implement filters with FPGA technology.&lt;/p&gt;&lt;img src="https://community.element14.com/aggbug?PostID=29098&amp;AppID=19&amp;AppType=Weblog&amp;ContentType=0" width="1" height="1"&gt;</description></item><item><title>RE: The Art of FPGA Design Season 2 Post 21</title><link>https://community.element14.com/technologies/fpga-group/b/blog/posts/the-art-of-fpga-design-season-2-post-21</link><pubDate>Tue, 05 Aug 2025 16:40:59 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:2d5eb677-aff9-421d-a574-6bd0209ae0d3</guid><dc:creator>BigG</dc:creator><slash:comments>1</slash:comments><description>&lt;p&gt;Of course, all AI engines rely on hardware to drive their incompetence&amp;nbsp;[emoticon:44a8a53ad3364ea78a16c5a3229f75bb].&lt;/p&gt;
&lt;p&gt;I came across a video the other day which discussed the use of FPGA design for handling neural networks (needed for AI). I&amp;#39;ve been dying to know, just how practical a solution is this considering the complexity of simple FPGA design (well to me anyway).&lt;/p&gt;&lt;img src="https://community.element14.com/aggbug?PostID=29098&amp;AppID=19&amp;AppType=Weblog&amp;ContentType=0" width="1" height="1"&gt;</description></item><item><title>RE: The Art of FPGA Design Season 2 Post 21</title><link>https://community.element14.com/technologies/fpga-group/b/blog/posts/the-art-of-fpga-design-season-2-post-21</link><pubDate>Tue, 05 Aug 2025 08:55:18 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:2d5eb677-aff9-421d-a574-6bd0209ae0d3</guid><dc:creator>michaelkellett</dc:creator><slash:comments>1</slash:comments><description>&lt;p&gt;Useful info - thanks.&lt;/p&gt;
&lt;p&gt;I found a nice paper for C coders:&lt;/p&gt;
&lt;p&gt;&lt;a id="" href="https://www.st.com/resource/en/design_tip/dt0091-lattice-wave-digital-filter-design-and-automatic-c-code-generation-stmicroelectronics.pdf" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;https://www.st.com/resource/en/design_tip/dt0091-lattice-wave-digital-filter-design-and-automatic-c-code-generation-stmicroelectronics.pdf&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;MK&lt;/p&gt;&lt;img src="https://community.element14.com/aggbug?PostID=29098&amp;AppID=19&amp;AppType=Weblog&amp;ContentType=0" width="1" height="1"&gt;</description></item></channel></rss>