<?xml-stylesheet type="text/xsl" href="https://community.element14.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>The Art of FPGA Design Season 2 Post 22</title><link>/technologies/fpga-group/b/blog/posts/the-art-of-fpga-design-season-2-post-22</link><description>LWDF IIRs
I am finally ready now to discuss the LWDF IIR filter architecture. In a few words, such a filter consists of two parallel all pass sections, which differ in order by 1, which means that one path is of odd order while the other one is...</description><dc:language>en-US</dc:language><generator>Telligent Community 12</generator><item><title>RE: The Art of FPGA Design Season 2 Post 22</title><link>https://community.element14.com/technologies/fpga-group/b/blog/posts/the-art-of-fpga-design-season-2-post-22</link><pubDate>Wed, 06 Aug 2025 19:53:12 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:0e790153-a1f0-48f2-8b8a-fab43c993570</guid><dc:creator>Jan Cumps</dc:creator><slash:comments>0</slash:comments><description>&lt;p&gt;We&amp;#39;re still recovering from the math in your previous post [emoticon:c4563cd7d5574777a71c318021cbbcc8]&lt;/p&gt;&lt;img src="https://community.element14.com/aggbug?PostID=29121&amp;AppID=19&amp;AppType=Weblog&amp;ContentType=0" width="1" height="1"&gt;</description></item></channel></rss>