<?xml-stylesheet type="text/xsl" href="https://community.element14.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>Fast VHDL CORDIC Sine and Cosine Component on Lattice XP2 Device Using Diamond 3.12 Part 2</title><link>/technologies/fpga-group/b/blog/posts/fast-vhdl-cordic-sine-and-cosine-component-on-lattice-xp2-device-using-diamond-3-12-part-2</link><description>Introduction
This is a follow-up to Fast VHDL CORDIC Sine and Cosine Component on Lattice XP2 Device Using Diamond 3.12 

I thought I had actually used the CORDIC component for real, but I was getting confused with other blogs, so now I&amp;#39;m going t...</description><dc:language>en-US</dc:language><generator>Telligent Community 12</generator><item><title>RE: Fast VHDL CORDIC Sine and Cosine Component on Lattice XP2 Device Using Diamond 3.12 Part 2</title><link>https://community.element14.com/technologies/fpga-group/b/blog/posts/fast-vhdl-cordic-sine-and-cosine-component-on-lattice-xp2-device-using-diamond-3-12-part-2</link><pubDate>Sun, 07 Jun 2026 14:46:24 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:9a8d0b3f-5d30-44fa-a128-53cc8958eeea</guid><dc:creator>jc2048</dc:creator><slash:comments>0</slash:comments><description>&lt;p&gt;Here is the sine and cosine in more detail&lt;/p&gt;
&lt;p&gt;&lt;img alt=" " src="/resized-image/__size/1280x720/__key/commentfiles/f7d226abd59f475c9d224a79e3f0ec07-9a8d0b3f-5d30-44fa-a128-53cc8958eeea/Screenshot_5F00_2026_2D00_06_2D00_07_5F00_10_2D00_03_2D00_14.png" /&gt;&lt;/p&gt;
&lt;p&gt;and here&amp;#39;s the spectrum view&lt;/p&gt;
&lt;p&gt;&lt;img alt=" " src="/resized-image/__size/1280x720/__key/commentfiles/f7d226abd59f475c9d224a79e3f0ec07-9a8d0b3f-5d30-44fa-a128-53cc8958eeea/Screenshot_5F00_2026_2D00_06_2D00_07_5F00_09_2D00_56_2D00_06.png" /&gt;&lt;/p&gt;
&lt;p&gt;with, and this surprised me, a THD figure of 0.005% (if you look closely, there isn&amp;#39;t anything much at the actual harmonics). So the CORDIC calculation of the sine must be fairly accurate. Presumably the other lines, clustered around the fundamental, are intermodulation products (but what would be the source of the interference?).&lt;/p&gt;&lt;img src="https://community.element14.com/aggbug?PostID=29528&amp;AppID=19&amp;AppType=Weblog&amp;ContentType=0" width="1" height="1"&gt;</description></item><item><title>RE: Fast VHDL CORDIC Sine and Cosine Component on Lattice XP2 Device Using Diamond 3.12 Part 2</title><link>https://community.element14.com/technologies/fpga-group/b/blog/posts/fast-vhdl-cordic-sine-and-cosine-component-on-lattice-xp2-device-using-diamond-3-12-part-2</link><pubDate>Wed, 18 Feb 2026 16:04:42 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:9a8d0b3f-5d30-44fa-a128-53cc8958eeea</guid><dc:creator>scottiebabe</dc:creator><slash:comments>1</slash:comments><description>&lt;p&gt;Very neat, I am experimenting with running an sdr on a pico and eventually will have to pick a fast atan2 approximation&lt;/p&gt;&lt;img src="https://community.element14.com/aggbug?PostID=29528&amp;AppID=19&amp;AppType=Weblog&amp;ContentType=0" width="1" height="1"&gt;</description></item><item><title>RE: Fast VHDL CORDIC Sine and Cosine Component on Lattice XP2 Device Using Diamond 3.12 Part 2</title><link>https://community.element14.com/technologies/fpga-group/b/blog/posts/fast-vhdl-cordic-sine-and-cosine-component-on-lattice-xp2-device-using-diamond-3-12-part-2</link><pubDate>Tue, 17 Feb 2026 20:32:17 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:9a8d0b3f-5d30-44fa-a128-53cc8958eeea</guid><dc:creator>DAB</dc:creator><slash:comments>1</slash:comments><description>&lt;p&gt;Nice update.&lt;/p&gt;&lt;img src="https://community.element14.com/aggbug?PostID=29528&amp;AppID=19&amp;AppType=Weblog&amp;ContentType=0" width="1" height="1"&gt;</description></item><item><title>RE: Fast VHDL CORDIC Sine and Cosine Component on Lattice XP2 Device Using Diamond 3.12 Part 2</title><link>https://community.element14.com/technologies/fpga-group/b/blog/posts/fast-vhdl-cordic-sine-and-cosine-component-on-lattice-xp2-device-using-diamond-3-12-part-2</link><pubDate>Tue, 17 Feb 2026 10:23:13 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:9a8d0b3f-5d30-44fa-a128-53cc8958eeea</guid><dc:creator>michaelkellett</dc:creator><slash:comments>1</slash:comments><description>&lt;p&gt;Nice to see an FPGA project at the register level in VHDL.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Good luck with the iCE40 - its a useful part&amp;nbsp; - (I just did a customer design on one recently) but pretty weedy by modern FPGA standards.&lt;/p&gt;
&lt;p&gt;On the other hand they are cheap, available in 48 pin QFN packages and use almost no power.&lt;/p&gt;
&lt;p&gt;MK&lt;/p&gt;&lt;img src="https://community.element14.com/aggbug?PostID=29528&amp;AppID=19&amp;AppType=Weblog&amp;ContentType=0" width="1" height="1"&gt;</description></item></channel></rss>