<?xml-stylesheet type="text/xsl" href="https://community.element14.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>Tang Nano 9k: Using Internal PSRAM in Gowin FPGAs</title><link>/technologies/fpga-group/b/blog/posts/tang-nano-9k-using-internal-psram-in-gowin-fpgas</link><description>Table of Contents

 Introduction 
 PSRAM Overview 
 Adding Gowin IP 
 VHDL Walk-Through 

 Entity: Ports to the Outside World 
 PLL Component 
 PSRAM Component 
 Process: Asynchronous Reset 
 Function 
 Process: Registered Portion 

 Read Operation Underway</description><dc:language>en-US</dc:language><generator>Telligent Community 12</generator><item><title>RE: Tang Nano 9k: Using Internal PSRAM in Gowin FPGAs</title><link>https://community.element14.com/technologies/fpga-group/b/blog/posts/tang-nano-9k-using-internal-psram-in-gowin-fpgas</link><pubDate>Thu, 08 Oct 2026 23:58:54 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:777db40d-df82-4686-8796-456a9951fa69</guid><dc:creator>dang74</dc:creator><slash:comments>1</slash:comments><description>&lt;p&gt;Thanks&amp;nbsp;[mention:b0bc65b9ecdc4307bd967592f00e340a:e9ed411860ed4f2ba0265705b8793d05]&amp;nbsp;the Gowin Designer software looks pretty good.&amp;nbsp; I am glad that the design process isn&amp;#39;t limited to command line.&lt;/p&gt;&lt;img src="https://community.element14.com/aggbug?PostID=30277&amp;AppID=19&amp;AppType=Weblog&amp;ContentType=0" width="1" height="1"&gt;</description></item></channel></rss>