RE: Entering The World Of FPGA's with a DEO-NANO P0082 - Part 3

DAB — Sat, 29 Jul 2017 19:43:10 GMT

Very nice post Lucie.

You just answered a number of items on my test list for this device.

Now, I understand you just followed one of the simple examples. If that is true, how much time (HH,MM) would you say it took you to begin the project and get to the point where it worked?

Just curious on the time investment needed by a newbie to start working with this device.

Thanks

DAB

RE: Entering The World Of FPGA's with a DEO-NANO P0082 - Part 3

johnbeetem — Sat, 29 Jul 2017 16:31:16 GMT

Lucie wrote: From that 32-bit bus, just 8 of those bits are fed into the "counter_bus_mux". I'm not sure exactly how that part works but it takes the data from those 8-bits and converts it into 4bits then displays it onto 4 LEDs.

Hopefully I got that right, if not then please feel free to explain better in the comments below!!

Here's my understanding of the schematic.

A 2:1 mux (multiplexer) is an "if-then-else" expression. It has two data inputs (the 4-bit buses data0x[3..0] and data1x[3..0]) and one select input "sel". The output (the 4-bit bus result[3..0]) is the data input selected by "sel": "result = if sel then data1x else data0x", or if you like C conditional expresions: "result = sel? data1x: data0x".

In the schematic, data0 is connected to counter[24..21] and data1 is connected to counter[20..23] (note the bit reversal), in each case extracting 4 consecutive bits from the 32-bit counter[31..0]. "sel" is connected to an external push-button KEY[0]. The default behavior (KEY[0] = 0) is a 4-bit binary counter in the LEDs. If you press the button (KEY[1] = 1), the order of the four bits reverse (LSb on left versus LSb on right) and the counter speed doubles. Fun demo! It's not clear from the schematic whether KEY and LEDs are active-high or active-low, and the left-to-right (or top-to-bottom) order of the LEDs.