<?xml-stylesheet type="text/xsl" href="https://community.element14.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>The Art of FPGA Design - Post 17</title><link>/technologies/fpga-group/b/blog/posts/the-art-of-fpga-design---post-17</link><description>Using the Carry-Save Adder, Computing a Running Average I will show in the next few posts some design examples where using a 3-input carry-save adder instead of the normal 2-input ripple-carry adder makes a significant difference. The first exam...</description><dc:language>en-US</dc:language><generator>Telligent Community 12</generator></channel></rss>