/technologies/fpga-group/b/blog/posts/xxicc-21st-century-co-design-release-0-1Here is the new release 0.1 of XXICC. I was very busy with work and family obligations over the last few years so I wasn&#39;t able to keep up with XXICC as I would have liked. 0.1 is a major release since it adds n-bit integers (1-32 bit...en-USTelligent Community 12https://community.element14.com/technologies/fpga-group/b/blog/posts/xxicc-21st-century-co-design-release-0-1Thu, 06 Jun 2019 21:56:20 GMT93d5dcb4-84c2-446f-b2cb-99731719e767:e6a092a8-631c-4434-b2ac-85b5686bfe61johnbeetem0<p>I tracked down a minor bug in figure editing, specifically when adding diagonal wires.&nbsp; I&#39;ll be including the bug fix in future XXICC releases, starting with 0.1a.&nbsp; If anyone needs it fixed earlier I&#39;ll do a patch.</p><img src="https://community.element14.com/aggbug?PostID=6437&AppID=19&AppType=Weblog&ContentType=0" width="1" height="1">https://community.element14.com/technologies/fpga-group/b/blog/posts/xxicc-21st-century-co-design-release-0-1Wed, 27 Feb 2019 19:06:40 GMT93d5dcb4-84c2-446f-b2cb-99731719e767:e6a092a8-631c-4434-b2ac-85b5686bfe61johnbeetem0<p>I fixed a trivial bug in the code that generates BLIF files for iCE40 FPGAs.&nbsp; See <a class="jive-link-wiki-small" href="/technologies/fpga-group/m/files/1248">XXICC code patches release 0.1</a></p><p>&nbsp;</p><p>Edit June 2, 2019: I fixed a more serious bug in the iCE40 FPGA code that generates BLIF.&nbsp; I replaced the release 0.1 patch to fix both bugs.</p><img src="https://community.element14.com/aggbug?PostID=6437&AppID=19&AppType=Weblog&ContentType=0" width="1" height="1">