<?xml-stylesheet type="text/xsl" href="https://community.element14.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>The Art of FPGA Design - Post 35</title><link>/technologies/fpga-group/b/blog/posts/the-art-of-fpga-design---post-35</link><description>Sorting Networks - The results for the VHDL implementation of Batcher&amp;#39;s sorting algorithm So how good is this VHDL implementation of a parallel sorting network? Before we look at the results here are the two modules that were missing from the pr...</description><dc:language>en-US</dc:language><generator>Telligent Community 12</generator><item><title>RE: The Art of FPGA Design - Post 35</title><link>https://community.element14.com/technologies/fpga-group/b/blog/posts/the-art-of-fpga-design---post-35</link><pubDate>Tue, 16 Jul 2019 14:28:28 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:ca2ee403-bcc5-4d0b-9dc2-dba9784b76eb</guid><dc:creator>michaelkellett</dc:creator><slash:comments>1</slash:comments><description>&lt;p&gt;I like your concept of small FPGA, to me a small FPGA might be a Lattice ICE 40 with 2k LUTs. I&amp;#39;ve never even seen a 450k LUT FPGA, let alone soldered one in.&lt;/p&gt;&lt;p&gt;The first FPGA I used was a Xilinx 2064, 8 x 8 matrix of 64 LUts !&lt;/p&gt;&lt;p&gt;&amp;nbsp;&lt;/p&gt;&lt;p&gt;It&amp;#39;s interesting to see what other people do.&lt;/p&gt;&lt;p&gt;&amp;nbsp;&lt;/p&gt;&lt;p&gt;I googled ZCU17EG but didn&amp;#39;t get a useful hit.&lt;/p&gt;&lt;p&gt;&amp;nbsp;&lt;/p&gt;&lt;p&gt;MK&lt;/p&gt;&lt;img src="https://community.element14.com/aggbug?PostID=7446&amp;AppID=19&amp;AppType=Weblog&amp;ContentType=0" width="1" height="1"&gt;</description></item></channel></rss>