/technologies/fpga-group/b/blog/posts/zynq-ultrascale-pmu-and-the-ultra96-v2-on-off-controllerThe Xilinx Zynq UltraScale+ MPSoC device has an integrated Platform Management Unit or PMU. This PMU&#39;s functionality is described in Chapter 6 of Xilinx UG1085, Zynq UltraScale+ Device Technical Reference Manual. The PMU controls many things on the Zen-USTelligent Community 12https://community.element14.com/technologies/fpga-group/b/blog/posts/zynq-ultrascale-pmu-and-the-ultra96-v2-on-off-controllerWed, 22 Jul 2020 03:46:47 GMT93d5dcb4-84c2-446f-b2cb-99731719e767:ee9749ba-a91a-4fd0-a4f8-fbd636dee2a9jrhtech1<p>Two questions.&nbsp; 1) What determines the time difference between when the Ultra96PowerButtonHandler runs and the kill on MIO34 is asserted?&nbsp; Or is MIO34 asserted because of the actions in ButtonHandler?&nbsp; 2) How does this initiate a clean shutdown on Linux?&nbsp; Are the IPI somehow telling linux to shutdown?</p><p>&nbsp;</p><p>thanks,</p><p>jeff</p><img src="https://community.element14.com/aggbug?PostID=8651&AppID=19&AppType=Weblog&ContentType=0" width="1" height="1">https://community.element14.com/technologies/fpga-group/b/blog/posts/zynq-ultrascale-pmu-and-the-ultra96-v2-on-off-controllerTue, 11 Feb 2020 16:43:51 GMT93d5dcb4-84c2-446f-b2cb-99731719e767:ee9749ba-a91a-4fd0-a4f8-fbd636dee2a9kevinkeryk0<p>Thanks Bryan!&nbsp; This is exactly what I needed for my Ultra96-V2 design and your instructions were exactly what I was looking for!&nbsp; Now I can power up right away by using a power strip rather than hunt for the push-button and accidentally risk injecting some ESD into my board!</p><p>&nbsp;</p><p>-Kevin</p><img src="https://community.element14.com/aggbug?PostID=8651&AppID=19&AppType=Weblog&ContentType=0" width="1" height="1">