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<?xml-stylesheet type="text/xsl" href="https://community.element14.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/"><channel><title>FPGA Developer Quiz Resource Guide</title><link>https://community.element14.com/technologies/fpga-group/w/quiz/5388/fpga-developer-quiz-resource-guide</link><description>Quiz</description><dc:language>en-US</dc:language><generator>Telligent Community 12</generator><item><title>FPGA Developer Quiz Resource Guide</title><link>https://community.element14.com/technologies/fpga-group/w/quiz/5388/fpga-developer-quiz-resource-guide</link><pubDate>Tue, 04 Jun 2024 21:20:35 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:b505856b-3d2a-49e4-871e-f1442c60aab3</guid><dc:creator>pchan</dc:creator><comments>https://community.element14.com/technologies/fpga-group/w/quiz/5388/fpga-developer-quiz-resource-guide#comments</comments><description>Current Revision posted to Quiz by pchan on 6/4/2024 9:20:35 PM&lt;br /&gt;
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&lt;div style="float:left;padding:6px 15px 6px 6px;vertical-align:top;"&gt;&lt;a href="/technologies/fpga-group/" data-e14adj="t"&gt;&lt;img alt="profile image" src="/e14/assets/legacy/2021/SummerFPGAQuiz_profile.png?v=2" width="100px" /&gt;&lt;/a&gt;&lt;/div&gt;
&lt;h5&gt;&lt;span style="display:inline-block;padding-right:15px;"&gt;sponsored by&lt;/span&gt; &lt;a href="https://www.microchip.com/" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;&lt;img loading="lazy" alt="image" style="display:inline-block;margin:4px 0px;vertical-align:top;"  src="/e14/assets/main/mfg-group-assets/microchipLogo.png" width="140px" /&gt;&lt;/a&gt;&lt;/h5&gt;
&lt;span style="padding:0px 5px 2px;"&gt;&lt;strong&gt;Quiz Resource&lt;/strong&gt;&lt;/span&gt;&lt;span&gt; | &lt;/span&gt; &lt;span style="padding:0px 5px 2px;"&gt;&lt;a class="jive-link-wiki-small" href="/technologies/fpga-group/w/documents/5343/the-summer-of-fpgas----microchip" data-e14adj="t"&gt;Summer of FPGA: Microchip&lt;/a&gt;&lt;/span&gt;&lt;span&gt; | &lt;/span&gt; &lt;span style="padding:0px 5px 2px;"&gt;&lt;a class="jivecontainerTT-hover-container jive-link-community-small" href="/products/manufacturers/microchip/" data-e14adj="t"&gt;Microchip&lt;/a&gt;&lt;/span&gt;&lt;span&gt; | &lt;/span&gt;&lt;span style="padding:0px 5px 2px;"&gt;&lt;a class="jive-link-wiki-small" href="/technologies/fpga-group/w/documents/5341/the-summer-of-fpgas---agenda" data-e14adj="t"&gt;Summer of FPGA: Main Agenda&lt;/a&gt;&lt;/span&gt;&lt;span&gt; | &lt;/span&gt;&lt;span style="padding:0px 5px 2px;"&gt;&lt;a class="jivecontainerTT-hover-container jive-link-socialgroup-small" href="/technologies/fpga-group/" data-e14adj="t"&gt;FPGA&lt;/a&gt;&lt;/span&gt;&lt;span&gt; | &lt;/span&gt;&lt;span style="padding:0px 5px 2px;"&gt;&lt;a href="/technologies/fpga-group/w/documents/5387/fpga-developer-quiz" data-e14adj="t"&gt;Return to Quiz &lt;img loading="lazy" alt="image" style="vertical-align:middle;"  src="/e14/assets/legacy/gen/LinkArrow.gif" /&gt;&lt;/a&gt;&lt;/span&gt;
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&lt;/div&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 1:&lt;/strong&gt; &lt;a class="jive-link-external-small" title="Hello FPGA 585484 Course" href="https://mu.microchip.com/hello-fpga/585484" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 585484 Course&lt;/a&gt;&lt;/p&gt;
&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 2:&lt;/strong&gt; &lt;a class="jive-link-external-small" title="Hello FPGA 585484 Course" href="https://mu.microchip.com/hello-fpga/585484" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 585484 Course&lt;/a&gt;&lt;/p&gt;
&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 3:&lt;/strong&gt; &lt;a class="jive-link-external-small" title="Hello FPGA 609887 Course" href="https://mu.microchip.com/hello-fpga/609887" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 609887 Course&lt;/a&gt;&lt;/p&gt;
&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 4:&lt;/strong&gt; &lt;a class="jive-link-external-small" title="Hello FPGA 585484 Course" href="https://mu.microchip.com/hello-fpga/585484" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 585484 Course&lt;/a&gt;&lt;/p&gt;
&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 5:&lt;/strong&gt; &lt;a class="jive-link-external-small" title="Hello FPGA 609887 Course" href="https://mu.microchip.com/hello-fpga/609887" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 609887 Course&lt;/a&gt;&lt;/p&gt;
&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 6:&lt;/strong&gt; &lt;a class="jive-link-external-small" title="Hello FPGA 585484 Course" href="https://mu.microchip.com/hello-fpga/585484" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 585484 Course&lt;/a&gt;&lt;/p&gt;
&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 7:&lt;/strong&gt; &lt;a class="jive-link-external-small" title="Hello FPGA 609887 Course" href="https://mu.microchip.com/hello-fpga/609887" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 609887 Course&lt;/a&gt;&lt;/p&gt;
&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 8:&lt;/strong&gt; &lt;a class="jive-link-external-small" title="Hello FPGA 585484 Course" href="https://mu.microchip.com/hello-fpga/585484" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 585484 Course&lt;/a&gt;&lt;/p&gt;
&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 9:&lt;/strong&gt; &lt;a class="jive-link-external-small" title="Polarfire FPGA White Paper" href="https://www.microsemi.com/document-portal/doc_download/1243174-polarfire-fpga-white-paper" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Polarfire FPGA White Paper&lt;/a&gt;&lt;/p&gt;
&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 10:&lt;/strong&gt; &lt;a class="jive-link-external-small" title="Hello FPGA 585484 Course" href="https://mu.microchip.com/hello-fpga/585484" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 585484 Course&lt;/a&gt;&lt;/p&gt;
&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 11:&lt;/strong&gt; &lt;a class="jive-link-external-small" title="Polarfire FPGA White Paper" href="https://www.microsemi.com/document-portal/doc_download/1243174-polarfire-fpga-white-paper" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Polarfire FPGA White Paper&lt;/a&gt;&lt;/p&gt;
&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 12:&lt;/strong&gt; &lt;a class="jive-link-external-small" title="Hello FPGA 585486 Course" href="https://mu.microchip.com/hello-fpga/585486" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 585486 Course&lt;/a&gt;&lt;/p&gt;
&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 13:&lt;/strong&gt; &lt;a class="jive-link-external-small" title="Hello FPGA 585486 Course" href="https://mu.microchip.com/hello-fpga/585486" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 585486 Course&lt;/a&gt;&lt;/p&gt;
&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 14:&lt;/strong&gt; &lt;a class="jive-link-external-small" title="Hello FPGA 631517 Course" href="https://mu.microchip.com/hello-fpga/631517" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 631517 Course&lt;/a&gt;&lt;/p&gt;
&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 15:&lt;/strong&gt;&amp;nbsp; &lt;a class="jive-link-external-small" title="Hello FPGA 585486 Course" href="https://mu.microchip.com/hello-fpga/585486" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 585486 Course&lt;/a&gt;&lt;/p&gt;
&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 16:&lt;/strong&gt; &lt;a class="jive-link-external-small" title="Hello FPGA 609887 Course" href="https://mu.microchip.com/hello-fpga/609887" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 609887 Course&lt;/a&gt;&lt;/p&gt;
&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 17:&lt;/strong&gt; &lt;a class="jive-link-external-small" title="Hello FPGA 609887 Course" href="https://mu.microchip.com/hello-fpga/609887" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 609887 Course&lt;/a&gt;&lt;/p&gt;
&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 18:&lt;/strong&gt; &lt;a class="jive-link-external-small" title="Hello FPGA 609887 Course" href="https://mu.microchip.com/hello-fpga/609887" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 609887 Course&lt;/a&gt;&lt;/p&gt;
&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 19:&lt;/strong&gt; &lt;a class="jive-link-external-small" title="Hello FPGA 609887 Course" href="https://mu.microchip.com/hello-fpga/609887" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 609887 Course&lt;/a&gt;&lt;/p&gt;
&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 20:&lt;/strong&gt; &lt;a class="jive-link-external-small" title="Hello FPGA 609887 Course" href="https://mu.microchip.com/hello-fpga/609887" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 609887 Course&lt;/a&gt;&lt;/p&gt;
&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 21:&lt;/strong&gt; &lt;a class="jive-link-external-small" title="Polarfire Fpga White Paper" href="https://www.microsemi.com/document-portal/doc_download/1243174-polarfire-fpga-white-paper" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Polarfire Fpga White Paper&lt;/a&gt;&lt;/p&gt;
&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 22:&lt;/strong&gt; &lt;a class="jive-link-external-small" title="Hello FPGA 609887 Course" href="https://mu.microchip.com/hello-fpga/609887" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 609887 Course&lt;/a&gt;&lt;/p&gt;
&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 23:&lt;/strong&gt; &lt;a class="jive-link-external-small" title="Hello FPGA 609887 Course" href="https://mu.microchip.com/hello-fpga/609887" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 609887 Course&lt;/a&gt;&lt;/p&gt;
&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 24:&lt;/strong&gt; &lt;a class="jive-link-external-small" title="Hello FPGA 631517 Course" href="https://mu.microchip.com/hello-fpga/631517" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 631517 Course&lt;/a&gt;&lt;/p&gt;
&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 25:&lt;/strong&gt; &lt;a class="jive-link-external-small" title="SmartFusion2 SoC FPGA Flash*Freeze" href="https://www.microsemi.com/document-portal/doc_download/131935-ac400-smartfusion2-soc-fpga-flash-freeze-entry-and-exit-with-softconsole-libero-soc-v11-8-application-note" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;SmartFusion2 SoC FPGA Flash*Freeze Application Note&lt;/a&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;

&lt;div style="font-size: 90%;"&gt;Tags: microchip, fpga_developer_quiz_resource&lt;/div&gt;
</description></item><item><title>FPGA Developer Quiz Resource Guide</title><link>https://community.element14.com/technologies/fpga-group/w/quiz/5388/fpga-developer-quiz-resource-guide/revision/1</link><pubDate>Wed, 06 Oct 2021 22:38:28 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:b505856b-3d2a-49e4-871e-f1442c60aab3</guid><dc:creator>pchan</dc:creator><comments>https://community.element14.com/technologies/fpga-group/w/quiz/5388/fpga-developer-quiz-resource-guide#comments</comments><description>Revision 1 posted to Quiz by pchan on 10/6/2021 10:38:28 PM&lt;br /&gt;
&lt;div style="padding:8px 8px 6px;border:1px solid #c6c6c6;"&gt;&lt;div style="float:left;vertical-align:top;padding:6px 15px 6px 6px;"&gt;&lt;a href="/technologies/fpga-group/" data-e14adj="t"&gt;&lt;img alt="profile image" src="/e14/assets/legacy/2021/SummerFPGAQuiz_profile.png?v=2" width="80px" /&gt;&lt;/a&gt;&lt;/div&gt;&lt;span style="color:#007fac;font-size:18px;font-weight:bold;"&gt;FPGA Developer Quiz&lt;/span&gt;&lt;p style="margin:0;font-style:italic;font-size:11px;"&gt;&lt;span style="display:inline-block;padding-right:15px;"&gt;sponsored by&lt;/span&gt; &lt;a href="https://www.microchip.com/" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;&lt;img loading="lazy" alt="image" src="/e14/assets/legacy/logos/microchip_sponsora.png" style="display:inline-block;vertical-align:top;margin:4px 0px;" width="120px"  /&gt;&lt;/a&gt;&lt;/p&gt;&lt;span style="padding:0px 5px 2px;"&gt;&lt;strong&gt;Quiz Resource&lt;/strong&gt;&lt;/span&gt;&lt;span&gt; | &lt;/span&gt; &lt;span style="padding:0px 5px 2px;"&gt;&lt;a class="jive-link-wiki-small" href="/technologies/fpga-group/w/documents/5343/the-summer-of-fpgas----microchip" data-e14adj="t"&gt;Summer of FPGA: Microchip&lt;/a&gt;&lt;/span&gt;&lt;span&gt; | &lt;/span&gt; &lt;span style="padding:0px 5px 2px;"&gt;&lt;a class="jivecontainerTT-hover-container jive-link-community-small" href="/products/manufacturers/microchip/" data-e14adj="t"&gt;Microchip&lt;/a&gt;&lt;/span&gt;&lt;span&gt; | &lt;/span&gt;&lt;span style="padding:0px 5px 2px;"&gt;&lt;a class="jive-link-wiki-small" href="/technologies/fpga-group/w/documents/5341/the-summer-of-fpgas---agenda" data-e14adj="t"&gt;Summer of FPGA: Main Agenda&lt;/a&gt;&lt;/span&gt;&lt;span&gt; | &lt;/span&gt;&lt;span style="padding:0px 5px 2px;"&gt;&lt;a class="jivecontainerTT-hover-container jive-link-socialgroup-small" href="/technologies/fpga-group/" data-e14adj="t"&gt;FPGA&lt;/a&gt;&lt;/span&gt;&lt;span&gt; | &lt;/span&gt;&lt;span style="padding:0px 5px 2px;"&gt;&lt;a href="/technologies/fpga-group/w/documents/5387/fpga-developer-quiz" data-e14adj="t"&gt;Return to Quiz &lt;img loading="lazy" alt="image" src="/e14/assets/legacy/gen/LinkArrow.gif" style="vertical-align:middle;"  /&gt;&lt;/a&gt;&lt;/span&gt;&lt;div style="clear:both;"&gt; &lt;/div&gt;&lt;/div&gt;&lt;p style="margin:0;padding:0px;padding-top:10px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 1:&lt;/strong&gt; &lt;a class="jive-link-external-small" href="https://mu.microchip.com/hello-fpga/585484" title="Hello FPGA 585484 Course" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 585484 Course&lt;/a&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 2:&lt;/strong&gt; &lt;a class="jive-link-external-small" href="https://mu.microchip.com/hello-fpga/585484" title="Hello FPGA 585484 Course" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 585484 Course&lt;/a&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 3:&lt;/strong&gt; &lt;a class="jive-link-external-small" href="https://mu.microchip.com/hello-fpga/609887" title="Hello FPGA 609887 Course" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 609887 Course&lt;/a&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 4:&lt;/strong&gt; &lt;a class="jive-link-external-small" href="https://mu.microchip.com/hello-fpga/585484" title="Hello FPGA 585484 Course" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 585484 Course&lt;/a&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 5:&lt;/strong&gt; &lt;a class="jive-link-external-small" href="https://mu.microchip.com/hello-fpga/609887" title="Hello FPGA 609887 Course" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 609887 Course&lt;/a&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 6:&lt;/strong&gt; &lt;a class="jive-link-external-small" href="https://mu.microchip.com/hello-fpga/585484" title="Hello FPGA 585484 Course" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 585484 Course&lt;/a&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 7:&lt;/strong&gt; &lt;a class="jive-link-external-small" href="https://mu.microchip.com/hello-fpga/609887" title="Hello FPGA 609887 Course" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 609887 Course&lt;/a&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 8:&lt;/strong&gt; &lt;a class="jive-link-external-small" href="https://mu.microchip.com/hello-fpga/585484" title="Hello FPGA 585484 Course" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 585484 Course&lt;/a&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 9:&lt;/strong&gt; &lt;a class="jive-link-external-small" href="https://www.microsemi.com/document-portal/doc_download/1243174-polarfire-fpga-white-paper" title="Polarfire FPGA White Paper" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Polarfire FPGA White Paper&lt;/a&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 10:&lt;/strong&gt; &lt;a class="jive-link-external-small" href="https://mu.microchip.com/hello-fpga/585484" title="Hello FPGA 585484 Course" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 585484 Course&lt;/a&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 11:&lt;/strong&gt; &lt;a class="jive-link-external-small" href="https://www.microsemi.com/document-portal/doc_download/1243174-polarfire-fpga-white-paper" title="Polarfire FPGA White Paper" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Polarfire FPGA White Paper&lt;/a&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 12:&lt;/strong&gt; &lt;a class="jive-link-external-small" href="https://mu.microchip.com/hello-fpga/585486" title="Hello FPGA 585486 Course" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 585486 Course&lt;/a&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 13:&lt;/strong&gt; &lt;a class="jive-link-external-small" href="https://mu.microchip.com/hello-fpga/585486" title="Hello FPGA 585486 Course" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 585486 Course&lt;/a&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 14:&lt;/strong&gt; &lt;a class="jive-link-external-small" href="https://mu.microchip.com/hello-fpga/631517" title="Hello FPGA 631517 Course" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 631517 Course&lt;/a&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 15:&lt;/strong&gt;&amp;nbsp; &lt;a class="jive-link-external-small" href="https://mu.microchip.com/hello-fpga/585486" title="Hello FPGA 585486 Course" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 585486 Course&lt;/a&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 16:&lt;/strong&gt; &lt;a class="jive-link-external-small" href="https://mu.microchip.com/hello-fpga/609887" title="Hello FPGA 609887 Course" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 609887 Course&lt;/a&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 17:&lt;/strong&gt; &lt;a class="jive-link-external-small" href="https://mu.microchip.com/hello-fpga/609887" title="Hello FPGA 609887 Course" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 609887 Course&lt;/a&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 18:&lt;/strong&gt; &lt;a class="jive-link-external-small" href="https://mu.microchip.com/hello-fpga/609887" title="Hello FPGA 609887 Course" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 609887 Course&lt;/a&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 19:&lt;/strong&gt; &lt;a class="jive-link-external-small" href="https://mu.microchip.com/hello-fpga/609887" title="Hello FPGA 609887 Course" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 609887 Course&lt;/a&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 20:&lt;/strong&gt; &lt;a class="jive-link-external-small" href="https://mu.microchip.com/hello-fpga/609887" title="Hello FPGA 609887 Course" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 609887 Course&lt;/a&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 21:&lt;/strong&gt; &lt;a class="jive-link-external-small" href="https://www.microsemi.com/document-portal/doc_download/1243174-polarfire-fpga-white-paper" title="Polarfire Fpga White Paper" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Polarfire Fpga White Paper&lt;/a&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 22:&lt;/strong&gt; &lt;a class="jive-link-external-small" href="https://mu.microchip.com/hello-fpga/609887" title="Hello FPGA 609887 Course" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 609887 Course&lt;/a&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 23:&lt;/strong&gt; &lt;a class="jive-link-external-small" href="https://mu.microchip.com/hello-fpga/609887" title="Hello FPGA 609887 Course" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 609887 Course&lt;/a&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 24:&lt;/strong&gt; &lt;a class="jive-link-external-small" href="https://mu.microchip.com/hello-fpga/631517" title="Hello FPGA 631517 Course" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;Hello FPGA 631517 Course&lt;/a&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;Question 25:&lt;/strong&gt; &lt;a class="jive-link-external-small" href="https://www.microsemi.com/document-portal/doc_download/131935-ac400-smartfusion2-soc-fpga-flash-freeze-entry-and-exit-with-softconsole-libero-soc-v11-8-application-note" title="SmartFusion2 SoC FPGA Flash*Freeze" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;SmartFusion2 SoC FPGA Flash*Freeze Application Note&lt;/a&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;

&lt;div style="font-size: 90%;"&gt;Tags: microchip, fpga_developer_quiz_resource&lt;/div&gt;
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