RE: Building a Differential Probe for Ground Plane Noise Examination

jc2048 — Sun, 14 Feb 2021 21:09:12 GMT

I'm impressed: you've made fast progress with this. It's starting to look like a useful tool.

I'm absolutely fine with you using the drawing.

I believe eMMC has a high-speed mode (0-52MHz) and a HS200 mode (0-200MHz). All the signals, including the clock, are single-ended, so the clock in particular will contaminate the ground plane quite badly when it's fast, but you'd expect to see some evidence of energy from the data edges lower down. The actual clock rate will depend on how things are arranged in the processor. The data will have to be DMA-ed in and out of the DDR memory, so it's all part and parcel of the memory control system, though the DDR side will easily keep up. (Of course, the quick way to determine the clock frequency would be to look at the clock pin with an oscilloscope.)

How accurate do you think the peak markers are? If the clock were just below 50MHz, you might expect quite a lot of the third harmonic up around 150MHz, as the board and the decoupling are probably working less effectively by that point. Could that

be what we're seeing, or is it definitely two separate signals?

RE: Building a Differential Probe for Ground Plane Noise Examination

DAB — Sun, 14 Feb 2021 18:58:38 GMT

Great post.

DAB