PYNQ-Z2 Dev Board: Python Productivity for Zynq®

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Attend the PYNQ Webinar on May 8th: Unlock the Power of FPGAs through Python: Building Reconfigurable Embedded Systems with PYNQ

 

 

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About

The TUL PYNQ™-Z2 board, based on Xilinx Zynq SoC and originally designed for the Xilinx University Program, supports the Python Productivity for Zynq® framework and embedded systems development. PYNQ is an open-source project from Xilinx® that makes it easy to design embedded systems with Xilinx Zynq® Systems on Chips (SoCs). Using the Python language and libraries, designers can exploit the benefits of programmable logic and microprocessors in Zynq to build more capable and exciting embedded systems. PYNQ is intended to be used by a wide range of designers and developers including:

  • Software developers who want to take advantage of the capabilities of Zynq and programmable hardware without having to use ASIC-style design tools to design hardware.
  • System architects who want an easy software interface and framework for rapid prototyping and development of their Zynq design.
  • Hardware designers who want their designs to be used by the widest possible audience.

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Key Features

  • ZYNQ XC7Z020-1CLG400C
  • Processor: Dual-Core ARM Cortex-A9
  • FPGA: 1.3M reconfigurable gates
  • Memory: 512MB DDR3 / 128Mbit FLASH
  • Storage: Micro SD card slot
  • Video: HDMI In / HDMI Out
  • Audio: HP+Mic, Line in, ADAU1761 AUDIO codec
  • Network: 10/100/1000 Ethernet
  • Expansion: USB Host connected to ARM PS
  • Interfaces GPIO: Arduino Header, Raspberry Pi, Pmods x2
  • Other I/O: 6x User LEDs, 4x Pushbuttons, 2x Switches
  • Dimensions: 87mm x 140mm
  • Accessories: Micro SD card 8G (image preload), AC/DC adapter, USB type-A to Micro USB Cable, and Ethernet cable

 

Video: Learn More About the PYNQ-Z2 from element14 presents

 

 

Additional Information

Important Dates

Enrollment Begin: May 6 2019

Enrollment Ends: June 6 2019

RoadTesters Selected: Jun 12 2019

Product Shipped: June 14 2019

RoadTesting Begins: June 21 2019

Reminder/Update Email: July 21 2019*

Submit Reviews By: August 21 2019*

*The element14 RoadTest Staff will send this reminder/update email.

**If a RoadTester is unable to meet the deadline, please notify the RoadTest Program Lead, , as soon as possible before the deadline.

RoadTesters

Terms and Conditions

RoadTest

PYNQ-Z2 Dev Board: Python Productivity for Zynq®

Terms and Conditions

These are the terms and conditions which govern the PYNQ-Z2 Dev Board: Python Productivity for Zynq® contest. This Contest requires participants to submit an application indicating their previous experience with this type of equipment/component, information on what they would do to test the equipment/component, and the applicant’s desire to post a thorough review of their experience with images, photos, or other supplemental materials. Participants will be required to meet the Conditions for Participation.  The winners of this RoadTest will receive the item(s) listed below. RoadTest Reviews are due no later than 60 days after the receipt of the item(s). No other prizes are offered.

The Principal terms of the Competition:

The following words and phrases are used in these terms and conditions and have the meanings given to them below.

(RoadTest or Contest)

Key dates:

Applications Close: midnight (GMT) on Jun 6 2019

Announcement of Winner (estimated): June 11 2019

Prize: PYNQ-Z2 Dev Board: Python Productivity for Zynq®

 

Competition Site: https://www.element14.com/community/groups/roadtest?ICID=menubar_resources_roadtest

Site or element14 Community: www.element14.com/community

Judges: members of the element14 community team chosen at the Organiser’s discretion.

Judging Criteria, All of the following which will have equal weighting:

· Demonstrated competence with the technologies including links or descriptions of past projects

· Qualifications as indicated by current job role and/or schooling/vocational training;

· A thorough description of how the prize would be tested;

· Likelihood that the Applicant will blog about the prize and provide a review on element14.com;

· Originality;

· Innovation.

Organiser: Premier Farnell plc (registered in England and Wales under company number 876412) whose registered office is at Farnell House, Forge Lane, Leeds, UK

Conditions for Qualification: in addition to meeting the requirements of these terms, all persons applying to take part in the Contest (each one an Applicant) must:

· Provide a RoadTest application describing what he/she would do if awarded the Prize including similar previous projects, product experience and qualifications

Terms: these terms and conditions which govern the Competition and to which the Organiser reserves the right to make changes from time to time and the latest version of these Terms from time to time will be posted to the Site.

  1. Eligibility
  2. Applications:
  3. Selecting Winners:
  4. Liability:
  5. General:

1.1 Save as set out in these Terms, the Contest is open to any natural or legal person, firm or company or group of natural persons or unincorporated body.

1.2 All Applicants must be aged at least 18 at the time of their application.

1.3 Applicants must not enter the RoadTest if doing so or taking part may:

1.3.1 cause the Organiser and/or themselves to be in breach of any agreement (including but not limited to any contract of employment) to which they are a party or in breach of any law, regulation or rule having the force of law to which the Organiser or the Applicant may be subject or any policy of the Organiser or the Sponsor;

1.3.2 Require the Organiser to obtain any licence, authorisation or permission to deal with the Applicant; or

1.3.3 Be in breach of any policy or practice of their employer. Some employers prohibit or restrict their employees from taking part in competitions such as these or receiving prizes under them and the Organiser respects those policies and practices.

The Organiser reserves the right to disqualify any Application made in breach of these Terms and to reject any Application which it reasonably believes may be or become in breach. The Organiser reserves the right to require evidence in such form as the Organiser may reasonably require of any Applicant’s compliance with any of these Terms and to disqualify any Applicant or Participant who cannot provide such evidence reasonably promptly.

1.4 Multiple applications are not permitted.

1.5 Applications may not be submitted by an agent whether acting on behalf of an undisclosed principal or otherwise.

1.6 The Contest is NOT open to:

1.6.1 Any person or entity who is a resident or national of any country which is subject to sanctions, embargoes or national trade restrictions of the United States of America, the European Union or the United Kingdom;

1.6.2 Any employee, director, member, shareholder (as appropriate) or any of their direct families (parents, siblings, spouse, partner, children) (“Direct Families”) of the Organiser and Sponsors; or

2.1 Each Applicant must fully complete and submit a RoadTest Application by the Application Close.

2.2 By submitting a Registration Form, each Applicant:

2.2.1 Authorises the Organiser to use his or her personal data (as defined in the Data Protection Act 1998) for the purposes of running and promoting the RoadTest;

2.2.2 Authorises the Organizer to copy, reproduce and publish their application should they be accepted as a Participant;

2.2.3 Will be deemed to have read, accepted and agree to be bound by these Terms. Applicants are advised to print and keep safe these Terms;

2.2.4 Authorises the Organiser to copy, reproduce and use the Application and/or Review for the purposes of the RoadTest and as otherwise contemplated by these Terms. The Organiser will not be responsible for any inaccuracy, error or omission contained in any reproduction or use of the Project Blogs.

2.2.5 Licenses the Organiser to use the intellectual property in the Project (IP) for the purposes of this Contest. As between the Applicant and the Organiser the IP remains owned by the Applicant.

2.2.6 Grants the Organiser the right to use his or her likeness, photographs, logos, trademarks, audio or video recordings without restriction for the purposes of Contest or the promotion of it or the Site;

2.2.7 Agrees to participate positively in all publicity surrounding the Contest;

2.2.8 Agrees to be responsible for all expenses and costs incurred by him or her in preparing for, entering and participating in the Contest (save for any expenses expressly agreed by the Organiser to be borne by it in these Terms);

2.2.9 Confirms that he or she owns all IP used in his or her application or Project or Blogs and indemnifies the Organiser from any claim by a third party that use of any material provided by an Applicant to the Organiser infringes the intellectual property rights of any third party;

2.2.10 Agrees not to act in any way or fail to act in any way or be associated with any cause or group which would have a negative impact on the reputation of the Organiser and/or the RoadTest.

2.3 All applications submitted to this RoadTest must meet the following criteria:

2.3.1 Applicants must be the author, creator and owner of the proposed review idea. Applicants must not submit someone else’s idea;

2.3.2 The proposed application must be reasonably achievable by the within the time constraints of the Contest;

2.3.3 Applications must not include or propose any of the following, the inclusion of which shall render any proposed application ineligible:

(a) Applications which relate to socially taboo topics, such as illicit drug use or sexual gratification;

(b) Applications that are or could reasonably be considered to be illegal, immoral, discriminatory or offensive as determined by the Organiser;

(c) Applications in relation to them which if accepted would infringe or breach any of the policies or terms of access or use of the Site.

2.4 No Application may contain any of the hazardous substances identified by Article 4 of Directive 2002/95/EC of the European Parliament on the Restrictions on the Use of Substances in Electronic and Electrical Equipment ("the Directive") or the use of such hazardous substances in the in any such Project must not exceed the maximum concentration values set out in the Directive.

3.1 Winners will be selected by the Organiser on the basis of the quality of his or her application and its adherence to these Terms.

3.2 The total number of Winners selected will be at least the minimum number set out above but the actual number is at the sole discretion of the Organizer and/or the Sponsor, if applicable.

3.3 The Organiser will use all reasonable efforts to announce the Winners via an update to the RoadTest page by the date listed above.

3.4 Winners agree to take part in all publicity which the Organiser or the Sponsor wishes to use to promote the RoadTest, the Products featured or other Contests with which the Organiser may be connected from time to time.

3.5 Details of the Winners may also be published in the media.

3.6 Winners are responsible for all applicable taxes, duties or other charges payable in relation to any prize.

3.7

4.1 The Organiser hereby excludes all and any Liability arising out of the Contest or the acceptance, use, quality, condition, suitability or performance of any Prize, even where that Liability may arise from the Organiser’s negligence.

4.2 Nothing in these Terms will affect any Liability of the Organiser for death or personal injury arising from its negligence, for breach of Part II of the Consumer Protection Act 1987 (in the event that any entrant is entitled to claim rights under the Consumer Protection Act 1987) or for any matter in relation to which it would be illegal for the Organiser to exclude or to attempt to exclude its Liability.

4.3 Subject to 4.2, neither the Organiser, any parent company nor any subsidiary of the Organiser or such parent company or any of their directors, officers and employees (together referred to in these terms and the ‘Associates’) makes any guarantee, warranty or representation of any kind, express or implied, with respect to this Competition or the Prizes potentially available under it. Neither the Organiser nor any of its Associates shall be responsible for any Liability that may arise out of or in connection with person’s participation in this Competition, the claiming, redemption or value of any prizes under it, the use or enjoyment of such prizes or any events or circumstances arising out of or in connection with any of them. Any implied warranties of condition, merchantability or suitability or fitness for purpose of any of them are hereby expressly excluded. Wherever used in these Terms, ‘Liability’ shall mean any and all costs, expenses, claims, damages, actions, proceedings, demands, losses and other liabilities (including legal fees and costs on a full indemnity basis) arising directly or indirectly out of or in connection with the matter concerned.

5.1 The RoadTest is organised and sponsored by the Organiser. The Organiser reserves the right to delegate all or any of its powers, rights and obligations arising in relation to the RoadTest to any Associate and certain such rights and powers are assumed by the Organiser on behalf of itself and each Associate. Reference to “Organiser” shall be deemed to include reference to each Associate.

5.2 The RoadTest may be terminated at any time if there are, in the sole opinion of the Organiser, an insufficient number of entries, or if the Applications are not of an appropriate standard for a competition of this nature. The Organiser has the right to cancel or suspend the RoadTest at any time due to circumstances outside its reasonable control.

5.3 The Organiser shall have the sole discretion to disqualify (without correspondence or right of appeal) any Applicant it considers to be adversely affecting the process or the operation of the RoadTest or to be in breach of these Terms or to be acting in a disruptive manner or with intent to annoy, abuse, threaten or harass any other Applicant or Participant.

5.4 The Organiser has the right to amend or add to these Terms from time to time. Revised Terms and Conditions will be posted on the Contest Site and it is a condition of entry to the RoadTest that Applicants agree to comply with these Terms and, if appropriate, such Terms as amended from time to time.

5.5 Headings are for convenience only and do not affect the interpretation or construction of these Terms and Conditions.

5.6 These Terms and the operation of the Contest shall be governed by and construed in accordance with English Law and any claim or matter arising under these Terms shall be subject to the exclusive jurisdiction of the English courts.

RoadTest Reviews
Comments
Anonymous
  • This is a Fantastic FPGA Kit, Now I am really confused between MiniZED and PYQNK ( I prefer Pink image )as a starter PL+PS Kit.

     

    Element 14 is making Harder for me to decide which Roadtest I should apply for image.

     

    Regards,

    GS Gill

  •   Hi, , I had a very bad internet connection since past couple of weeks, I was trying to enrol for this roadtest yesterday and was constantly getting error messages (Java exception error)

    after couple of tries, I checked the Content Page of my account and it says that I am enrolled.

     

    Can I please request you to check weather there was a fault in submitting application or was it submitted.

     

    Thanks and Regards,

    GS Gill

  • "and whether it is necessary to write your own device drivers in C"

     

    There's a bit of information on drivers in this overlay tutorial here:

    https://pynq.readthedocs.io/en/v2.4/overlay_design_methodology/overlay_tutorial.html

  • For those interested, the aforementioned book also has a case study in using the PYNQ framework for developing a remote sensing project whereby a low resolution forward looking imager located on a satellite is being fed into a machine learning algorithm which is then used to steer a high resolution overhead imager on the same satellite to capture cloud-free areas of land.

     

    You can see the PYNQ-Z1 hardware being used in the video of the simulation here:

    https://craftprospect.com/fli-prototype-in-simulation-loop/

  • Chapter 22 of "Exploring Zynq MPSoC: With PYNQ and Machine Learning Applications" may be of interest as it reveals some of the philosophy and influences behind the PYNQ framework.

     

    https://www.amazon.co.uk/dp/0992978769/ref=as_li_tl

     

    You can download a PDF copy for free here:

    https://www.zynq-mpsoc-book.com/

  • An interesting learning platform - I can see why it might have been designed for the Xilinx University Program.

    Not sure how practical it is for the types of developers listed though?

    If you only wanted to use Python to control hardware, I would have thought the Raspberry Pi or an MCU running microPython (e.g. microBit, ESP32 or even OpenMV Cam H7) would have been simpler, and certainly cheaper option?

     

    Where I think this could be really useful is for:

    1. Rapid exploration and evaluation of new design concepts. You could try out new ideas by changing a few lines of Python from Jupyter Notebook, press a button and see the results.

    2. Applications that require some signal processing/computation/etc functions to be done in hardware, where those functions may occasionally need to be modified or replaced during operation. The partial reconfigurabilty of the FPGA programmable logic (PL) using Python overlays would be a neat way to update the hardware functions.

     

    Both of these uses would depend on what functions are in the overlay libraries; how easy it is to create your own overlays from RTL VHDL/Verilog code or Vivado IP Generator; and whether it is necessary to write your own device drivers in C.

     

    I am tempted to apply to find out for myself! Unfortunately, I am not sure if I could find the time at the moment, so perhaps someone else could investigate and let us all know?

  • At the lower level, the questions as to how efficient the synthesis is would be something that a product developer has to consider

     

    You are very likely correct there. And if this moves the same way as compiler optimisation, they may be able to generate designs as efficient as what's done by a decent fpga designer.

    I think I have a blind spot and don't see where and how the Zinq training path deals with the hardware/programmable logic design part.

  • I was not advocating avoiding HDL, however with the Zynq and other related SoC type FPGAs , the line between the Hardware Engineer and the Software Engineer is getting much thinner. For some folks, the idea of learning an HDL language is not thought of being simple and traditionally geared towards EEs and not Software folks.  Companies such as Xilinx are just offering a path to using their devices without having to focus on two separate development environments; PL (Programming Logic for the Hardware Folks: FPGA) and PS (Processing System for the Embedded Software folks: ARM).  And with PYNQ, this is taken further up stream where Python is used with the device.  At the lower level, the questions as to how efficient the synthesis is would be something that a product developer has to consider as well as staffing requirements and time to market. 

  • , avoiding the HDL makes it much more accessible as as starting point. On the other hand I think this is circling around the FPGA subject.

    Presenting prepared blocks then teaching how to integrate them with C isn’t stepping up fpga knowledge. It does step up fpga usage. Am I off with that thought?

  • This is another great update to one of the Zynq based dev boards.  With the added Raspberry Pi compatible headers, it expands the options to use the various Hats and related devices that are available.   With Vivado SDK and SDSoC, development can be done with just C or C++ without the needs to know VHDL or Verilog; although having knowledge of these would not hurt.  Plus with the expanding work that is be done with PYNQ, the path to entry to FPGA based devices has gotten much simpler. 

    I do like the PYNQ-BOT reference as well as the Jupyter Notebooks offerings.  Initially I was not a real fan of Jupyter Notebooks, but having worked with them more now, I am seeing many possibilities for both training as well as running test cases from Notebooks.

     

    Next to the Zybo Z7, this would be the next Zynq based dev board I would look at.

    PYNQ-BOT

    https://github.com/Xilinx/PYNQ-BOT

     

    PYNQ Advanced Jupyter Notebooks

    https://github.com/Xilinx/PYNQ/blob/master/docs/source/jupyter_notebooks_advanced_features.ipynb

  • Looks like a great way to play with FPGA integration.  I watched the webinar and was impressed by the Python integration in the development flow.

  • Yes, I thought it was a rather strange example unless OpenCV had been optimised to use the FPGA acceleration in some way.

     

    According to this article (PYNQ on the ARTY Z7-20):

     

       Use Python, Zynq and OpenCV to Implement Computer Vision

       https://www.hackster.io/adam-taylor/use-python-zynq-and-opencv-to-implement-computer-vision-361e1b

     

    if using the HDMI input, it looks like you can use the FPGA core for colour space conversion during the video ingest improving the performance of the image capture over that of using OpenCV with the USB webcam, by about 3-fold.

     

    As you say, actually locating the faces in the frame looks like it is being done on the ARM processor, so little to be gained in FPGA performance out of the box.

  •   wrote:

    Is the USB webcam definitely going through the FPGA core in this demo example ?

    You are right, webcam/USB is using software only. I got confused and made all "video" sources the same in my head. HDMI IN would have had some acceleration, though, the FPS would not have changed much. Most of the time is spent locating the faces on the ARM processor.

     

    In retrospect, it is a weird example to feature in the included notebook. It does not really show off anything in regards to the FPGA/Programmable Logic layer. It is quick and easy to code up, but there is no performance benefit. Unless I am missing something, only a small number of OpenCV accelerations are available in Python/PNYQ. And those may require the input be HDMI.

     

    It appears you need to build your own overlays based on xfOpenCV for more accelerations.

  • - nice video. Is the USB webcam definitely going through the FPGA core in this demo example ? From the code snippet it looks like it may be being captured directly via CV2 on the ARM processor.

     

    Have been interested in a project like this myself but instead using the HDMI input as a capture source and passing through to the HDMI output with a bit of image recognition going on in-between. Hopefully using the FPGA for the 'heavy lifting' where possible but then using the flexibility of Python for simplicity of working with the lighter 'metadata' type aspects such as the time and position and number of objects having been detected. However, ideally it would need to be able to handle full frame rate video (25 - 30fps).

     

    Up until now I had been looking at the likes of the ARTY Z7-20 for this (which looks like it can run PYNQ as well) but I've seen claims that it can achieve nearer 30fps for face detection with the demo example. The ARTY Z7-20 dev board looks a similar spec to the PYNQ-Z1 mentioned in the recent PYNQ webinar, which also looks a similar spec to the PYNQ-Z2 being offered in this RoadTest, so was a bit surprised at the 1fps mentioned in the video.

  • This is a great board for anyone who wants to harness the raw digital capabilities of an FPGA but who doesn't want to get involved with VHDL coding or who doesn't have a top spec machine - the Jupyter notebook server running on the embedded ARM core allows interaction to any standard browser for creating your project. I imagine it can be setup from a Chromebook or Raspberry Pi for example. My first steps on the PYNQ-Z1 (similar) are PYNQ - An Overview if you want to see how easy it is.

     

    Rod

  • interesting board, I have to think about a challenging project for the summer holidays.