Developing Zynq MPSoC Hardware
I decided to start with the Zynq MPSoC Hardware courses - most of it seemed very similar to Zynq-7000 which was covered in Path to Programmable, so I'm hoping that I will be able to get through all of the material quickly.
HW Chapter 1 video: The Case for a System-on-Chip
This video was about:
- the advantages of parallel processing and how it can overcome the bottlenecks in most software caused by sequential processing.
- a dual-chip solution (processor + FPGA) vs the integration that Zynq offers
- The evolution of Xilinx processing heritage - from the old Virtex parts with PowerPC cores to Zynq-7000 to Zynq UltraScale+
- What Zynq UltraScale+ offers over Zynq-7000
- The benefits of system integration, the security features and the entire middleware/stack ecosystem offered by Xilinx partners
- Avnet's Zynq prototyping solutions
- Xilinx UltraFast Design Methodology & Vivado IP Integrator
HW Lab 0 - Pre-Lab: Setting Up your Development System
This was a list of instructions to setup the Ubuntu VM and install Xilinx tools
HW Lab 1 - Building a Basic Zynq MPSoC Design
This lab had 2 experiments:
- Create a new Vivado project for the ZU3EG SBVA484-1 part
- Add the Zynq UltraScale+ MPSoC block to a block design
HW Chapter 2 video: Zynq MPSoC Processor Overview
This video went over:
- The hardware blocks in the Zynq MPSoC
- Zynq MPSoC Power Architecture (power domains)
- The Cortex A53 & Cortex R5 Processors
- Cache Coherency Features
- Cortex A53 NEON features, clocking options and the DDR memory & PS-PL interfaces
HW Lab 2 - PS Configuration Part 1 - HelloWorld
In this lab, we:
- enabled and mapped a PS UART to the MIO
- configured the clocks and DRAM controller
- exported the design to Xilinx SDK
- Created a BSP & Hello World application, which was executed.
HW Chapter 3 video: Peripherals
- General Connectivity: GbE, USB, SD, Quad SPI, CAN, I2C, UART SPI etc.
- High Speed Connectivity: PCIe Gen 2, SATA, DisplayPort
- Address Map
HW Lab 3 - PS Configuration Part 2 - MIO Peripherals
- Enabled a bunch of MIO peripherals: SPI, UART, SD, USB etc.
- Configured various clocks (sources, PLL settings etc.)
- Ran the Hello World & Memory Test applications
HW Chapter 4 video: The Power of Tcl
- An introduction to Tcl
- The benefits of XDC & Tcl
- Scripting in Vivado using Tcl
HW Lab 4 - Using TCL in Vivado Embedded Designs
- Basic Tcl commands in Vivado to create block designs, export them etc.
- Recreating a project using a Tcl script