Hello!
This is the first of multiple posts in Path II Programmable training lessons from Element14, Xilinx, and Avnet. I participated in Path [1] to Programmable exactly 1 year ago, and was fortunate to be chosen for the second in the series. This year's training comes with a much fancier board - the Ultra96 version 2. Last time around we had the MiniZed, which is well capable in its own rights.
For those interested, here is a link to the training that I did last year:
About
The training is very similar to a college course - we have lectures and we have labs. The lectures come to the trainees in the form of videos we watch and they cover theory and concepts. The labs apply what we are learning into real life examples. I have noticed already that the lecture videos this time around seem to be much improved and feel much more natural. The narrator seems to be talking naturally instead of [ostensibly] reading from a teleprompter which makes the lessons flow more naturally and easier to watch. Good job to Avnet and Xilinx for the revamp!
Lab 00
The first lab is all about getting the Ubuntu Virtual environment all set up. This actually took me about 8 hours total over a few days since I kept running into issues with the Guest Addons for VirtualBox. These are what provide a shared clipboard and drag & drop functionality. I had to run a bunch of updates before that started to work correctly. One other thing that took a while was downloading everything. I probably had over 50 GB of required downloads and it took quite a while to get through.
Image 01 - Just the IDE installer took about 1.5 hours to run.
Lab 01
The first lab was very basic and just consisted of launching Vivado and creating a basic block design. Although the Ultra96 board has apparently a bit of a cult following (similar to Arduino), and it is much easier to 'get into' than this training shows, we start very basic. We use Vivado as the IDE and add the raw MPSoC (Multi Processor System on Chip) as the base. As an analog, in the mainstream Arduino world, we just launch the Arduino program, open a 'blink' sketch, and can upload it to make an LED turn on and off. This doesn't teach the user much about what is really happening inside the chip or how the board is physically wired, but it does provide a quick way to get started and make real world things happen based on a few lines of code. This training assumes that the user will be creating their own custom embedded design with a custom PCB and the Zynq chip custom integrated. This lab consists of creating a new layout and adding the blank Zynq chip.
Lab 02
Lab 02 picks up from where Lab 01 left off. We configure the UART (serial port) then export a VHDL (hardware description language). The SDK (Software development kit) is launched after that. We import the 'hardware' (VHDL), create a Board Support Package, then create a new program on top of that base. The program is a basic 'hello world' script that prints out something on the serial port. It is very useful for this type of development as it can verify that all the connections are really working. As noted above, this training is designed around an end user creating their own custom board solution utilizing the Zynq chip and not necessarily using the Ultra96 board in its stock form. So starting from a very basic sense, this lab was similar to the Apollo 8 mission which showed that we have a good chance of making to to the moon (but being careful and meticulous in the process). It was a full dressed rehearsal.
I had a few issues in this lesson getting the FPGA to program properly. I had to check the "reset entire system" option in the SDK before I could get the Ultra96 to program properly. This was something that I learned during the P2P from last year and came in handy.
It did take my computer quite a while to export the VHDL which was a complaint I had from last year.It took about 11 minutes for this process; followed by importing to SDK, creating board support package, then doing the programming and uploading. I dread to think about how I traditionally program ("brute force method" and how long this overall process would take. We can see from the CPU usage that only a single CPU core is used during this process; despite the configuration setting to use multiple processes for this step.
Video Overview
Here is a video overview of the first lessons:
Thanks again to the E14 team and Avnet/Xilinx and looking forward to getting on with the rest of the lessons.
- James
