I have a doubt regarding active-high SR flipflop(i.e.., here we are using nor gate ).Nor gate will be active when both the inputs are low. When the set input is given high how does the output Q will be high .As we know that when the input is 00 for a NOR gate , then only the output will be high. I hope that I will get cleared my as early as possible.
Thanking you mam
Good presentation on basic Flip Flop options.
These devices are an essential cornerstone of control logic implementation.