Inspiration
A long long time ago, in the early days of my VHDL endeavors, I set out to re-use an analog 20MHz scope that was sitting in a corner of my company's lab as a clock display. Inspired by PicOClock from Bruno Gavand (Oct 2007), I wanted to do the same clock with an FPGA. From the timestamp of my original source code this was in September 2009. The device of choice was an Altera MAX10, which run out of logic cell with the implementation of a 12 hour clock, a 24 hour display was out of the question. And the board was property of a previous company, so I don't have access any more.
Off The Shelf
With the announcement of the Off-the-shelf competition and proud owner of a 4-channel scope and an ARTY-S7 board, I figured to re-vamp the design and make it more colourful and maybe a 24-hour clock.
Theory of Operation
A 7-segment display is basically 3 horizontal bars plus 4 vertical bars. To display this on an oscilloscope, 4 different voltage levels are required which are easily generated by 2 output pins and 4 resistors building a resistor ladder ADC. The resistor values define the voltage levels and for equidistant level, a R-2R setup is the way to go. Identical to the original MCU implementation, I selected a 1 millisecond horizontal timebase for the full screen. Several counters at usec and msec intervals generate 1000 timeslots per millisecond, each timeslot 1 usec wide. During each timeslot, a comparison of the clock digits sets the outputs pins to get the correct voltage level through the ADC. Horizontal bars are a constant level, multiple bars, e.g. all 3 are active at digit '8' are interleaved through up to 3 frames and have a slight flicker visible. Vertical bars switch between 2 levels at consecutive timeslots to generate thicker visible lines. Again depending on the active digit, the vertical bar goes from top to bottom or center. Hour, minute and second counters take care of the time keeping, which limits the clock accuracy to the crystal. No real time clocks were harmed during this project.
2 buttons are used to cycle through hours and minutes to set the correct time, the seconds are reset to 0 with every button press.
Implementation
As I knew that the code was already running, I only had to adjust the primary usec timer to the clock frequency of 12 MHz on the board. Everything else is synchronous to counters from there.
Only the output is one huge ugly mess of combinatorial logic per channel, which does not really matter in this case as every comparison is based on the msec timer and there will be enough headroom for the propagation delay to not glitch.
The FPGA code and the pin mapping file for the ARTY-S7 board in Xilinx Vivado are attached to this blog post.
I also had to build 3 or 4 resistor ladders for 3 or 4 scope channels + another pickup for the millisecond pulse feeding the aux trigger input. I have never used PMOD modules before so I decided to use the PMOD ports on the ARTY board, which are basically 0.1" header with 6x2 rows. I used my off-the-shelf old school solder trace and wire on protoboard instead of a breadboard to make the setup a little more permanent. It became a 1 1/2 layer board with all through hole components on one side and the solder pads + some free form wires on the bottom side.
| {gallery} Build details |
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Front of the board |
Back of the board |
FPGA board setup and scope connection |
Closeup of 3 colour scope probe connection + ext trigger |
Oscilloscope-Clock Display |
Here is the full circuit, that I have built on the protoboard to run the clock. Buttons to set the correct time were re-used on the ARTY board.
Result
To visualize the running clock, the oscilloscope has be set up at 100usec per division with the trigger position at the very left edge of the screen and 0.5V/div, all channels at the same offset level, ideally just outside the bottom edge of the screen. There are artifacts visible when the 'beam' enters the screen from the bottom, adjusting the intensity can minimize this effect.
Here is a short video of the clock running in 3 colour mode.
[videos]
Conclusion
As far as I know this is the 1st ever multi-colour clock implementation on a scope, using an expensive piece of test gear for a benign but useful function.
At any moment, the feature creep could kick in to add some code to use the 4th colour (e.g. for the dots) and expand the display to a full 24 hour clock.
Next entry on the new project list would be a multi-colour analog clock driven by my trusted FPGA with the scope in X-Y mode and a whole bunch of arithmetic done in VHDL. This one goes on the shelf for now, as I just made room by taking this project off the shelf. I hope everybody does enjoy it as much as I do.
And A Late Night Double Feature Picture Show
Ambition and the spirit of the contest spurred me on to finish this before closing date.
First I 'borrowed' another BNC cable and added the 4th channel to generate a true 4 colour picture. I decided to keep the look clean with separate colours for hours, minutes and seconds and only make the separator dots in nice channel 4 green. Also I pushed the offset for channel 4 up to move the dots into a more visibly pleasing location.
And finally, with that huge FPGA it was no problem to upgrade the clock to a full 24 hour display.The full design is only using 1% of the LUTs and flip-flops.
PS: The scope itself, is 'on the shelf' for a long time as well, as dusty as the pictures are. My apologies for the picture quality.