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  • Author Author: tariq.ahmad
  • Date Created: 10 May 2017 8:26 PM Date Created
  • Last Updated Last Updated: 23 Sep 2024 3:52 PM
  • Views 56319 views
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Top Comments

  • dougw
    dougw over 8 years ago +24
    I guess the suggestion box moved here so I will reiterate one idea I mentioned earlier and add one: - a classroom demonstration of some physics phenomenon ( jc2048 had some good ideas ) - a solar powered…
  • jack.chaney56
    jack.chaney56 over 8 years ago +11
    Keeping with July and (northern hemisphere) Summer time, I like Douglas' ideas. Demonstration of physical phenomenon for classroom is a great avenue, I was thinking lots of solar stuff. Charging systems…
  • balearicdynamics
    balearicdynamics over 8 years ago in reply to Workshopshed +11
    I will ad also a time machine. Sound good ? Enrico
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  • phoenixcomm
    phoenixcomm over 6 years ago

    If I had time I would love to build a bit-slice computer, with  4, AMD 2901 which would make it a 16 bit CPU. The question is what architecture. Maybe an ARM Core

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  • phoenixcomm
    phoenixcomm over 6 years ago

    If I had time I would love to build a bit-slice computer, with  4, AMD 2901 which would make it a 16 bit CPU. The question is what architecture. Maybe an ARM Core

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  • jack.chaney56
    jack.chaney56 over 6 years ago in reply to phoenixcomm

    Sounds like a fun project, and would probably make for a good demo if you take lots of pictures to show all the steps.  The constructs of architecture is a little lacking in most curriculums these days.

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  • phoenixcomm
    phoenixcomm over 6 years ago in reply to jack.chaney56

    I don't know if I can fudge it. And the design of the AM2901 lends itself to Harvard Architecture ie. IBM 360, or others. To coerce AM2901 into ARM would be tough by itself, I would have to use external registers out of the ALU and the same bus also would have barrel shifter,  the problem is it would take ALOT of time. You have to realize that this means you first write microcode which controls the CPU, then the state diagrams, then use YACC & LEX to generate the code just to run the thing. and then port a small portion of ANSII C really the core math, if, loops. And that doesn't even get to functions, preprocessor,  or STDIO lib!  it easy way is just getting to Triples and then run that. ie an interpreter. sort of like basic.

    ARM/SPARC works like this Variable1, Variable2, Output Now these can be Memory or Registers that why SPARC had 144 including 8 separate registers for integer math!

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  • phoenixcomm
    phoenixcomm over 6 years ago in reply to phoenixcomm

    jack.chaney56 clem57 and anybody else who wants to get on this train. I have started a Blog about this: NexGen: Question is it possible to build an ARM7 Core from AM2901 Bit Slices? Which shows the architecture of the two cores.

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  • jack.chaney56
    jack.chaney56 over 6 years ago in reply to phoenixcomm

    Sorry for not responding sooner. My forte is in the realm of logic flow and schedulers. I am also strong in the realm of interrupts and event driven operations. I would need to refresh on some of the details of architecture of bit-slicing, But I presume it hasn't changed too much since when I studied it, I should be able to catch up.

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