Concept and real world image of the FinFET series (via TSMC)
Moore’s Law, Gordon E. Moore’s mid 1950s observation that computers usage of transistors grows exponentially over time, still appears to be much in effect, as companies continue to race to improve the speed and performance of computing technology today. Morris Chang, Taiwanese Semiconductor Manufacturing Company’s (TSMC) CEO, says that his company will continue to pursue that old law with a predicted 7-8 years of forthcoming technological advances. The comment comes in the wake of TSMC’s decision to finally push production of their anticipated FinFET chip design at the back-end of this year.
FinFET chips have been in industry talks for years now since microprocessor manufacturers began developing double-gate transistor designs in the early 2000s; TSMC had previously introduce an “Omega FinFET” design back in December of 2002 that improved upon transistors of the time. Unlike normal multi-gate transistors, FinFETs utilize a thin silicon fin, which wraps around the transistors conducting channel. The result is a 3D structure that gives more volume for the same planar area in a normal MOSFET; this “wrap” design gives the gate better control over the conducting channel for less current leak, and ultimately allows engineers to design devices with faster switching speeds.
With much anticipated competition from Samsung and Globalfoundries, TSMC’s 16-nm FinFET chip will be in the works in that latter part of 2013. Though not much is known about the chip’s innards at the time, the 16-nm design will be much of an improvement over current 28-nm chips with an extended battery life, lower energy consumption, and speed improvements - the usual stat sheet of an optimized transistor design. TSMC has also announced that it will continue to push Moore’s Law by developing a 10-nm chip that hopes to be out in late 2015. This design will use extreme ultraviolet lithography (EUV) for its manufacturing process, though the company is also researching e-beam as an option.
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