MEMBER COMMENTS WANTED on Real World FPGA Training and Development: Solving the Learning Curve Challenge with 5 Community Members

Question

Greetings to all Members!

(I hope everyone is having a great start to their summer. It's been warm in Chicago but still great weather.)

The reason I am writing today, and inviting all the members of element14 to discuss, is to tell you about a project I have been working on. About a month ago, I had a discussion about it with our Top Members group, but now I am close to launching the project and I want to get all members to join the discussion.

A Year of Living with FPGAs

In the past year, element14 (and myself in particular) has spent a lot of time talking about FPGAs. It's primarily due to our belief that FPGAs will play a role in the hardware of the Internet of Things, which is just starting to take off, and partly because we felt what we were doing on FPGAs was part of the professional development initiatives that are central to the element14 community. So, the project I am working on involves both FPGAs and professional development. Let me tell you about it in detail.

What's Stopping You From Developing with FPGAs?

I began a discussion on this question at the beginning of the year. At the time, I just wanted to stimulate a discussion. But two of our members ( Workshopshed and ntewinkel ) boiled down the issue to these things:

1) The need for a change of mindshift from sequential programming to logical building blocks

2) Learning a whole new toolset to get these things programmed

3) Killer app. Given that I can do most things I need using a microcontoller I've no need to swap to FPGAs

4) 1, 2 and 3 plus "The Learning Curve"

Of the four points above, we felt point 4, the learning curve, was something that our community could take on, explore, and contribute to how to lessen the hassle of the learning curve. Well, that's my theory, anyway. What follows is how we are going to address the Learning Curve Challenge of Designing with FPGAs.

Real World FPGA Training and Development with 5 Community Members

The project will take five element14 members who have no (or very little) experience designing with FPGAs/SoC, and train them to better understand the technology, development tools and design flow process. The training will consist of giving them access to the online training of Avnet's two courses called:

Developing Zynq Software: In the Developing Zynq Software Speedway, you will be introduced to Xilinx SDK and shown how it offers everything necessary to make Zynq software design easy. This class will cover these capabilities, including BSP creation, built-in drivers, example C code, interrupts, debugging, flash programming, I2C interface between a TE connectivity Pmod, and where to get more help.
Developing Zynq Hardware: In the Developing Zynq Hardware Speedway, you will be introduced to the single ARM Cortex –A9 Processor core as you explore its robust AXI peripheral set. Doing so you will utilize the Xilinx embedded systems tool set to design a Zynq AP SoC system, add Xilinx IP as well as custom IP, run software applications to test the IP, and finally Debug your embedded system.

(I just download the training videos and hand-on lab exercises and they are big files!)

This is not public training or Youtube training.

They have been specially produced by Avnet to teach FPGA development. In a classroom situation, each omodule is 8 hours of live training. For this project, the 5 members will receive the files online, with the lab exercises. After the training, the five trainees will be given a Minized development board -- a single-core Zynq 7Z007S development board designed for entry-level Zynq developers. The trainees will be required to build a project of their choice using the skills they have acquired from the training.

Documenting the Learning Curve: Blogging about Their Experiences

The trainees will be required to blog about every 10 days on element14 about their experience, spanning the online training and project building, documenting their learning successes and tribulations and giving the community their observations. We want to learn and observe what was easy for you and what was not. This is important for getting a handle on the learning curve challenge. (Again, my theory.)

How To Become a Trainee

While all element14 members are welcome to apply. All interested members will need to submit an application. At this point, we are leaning to using the Design challenge group, primarily because it is set up for applications and blogging.

How The Trainees Will Be Selected

To select the five official trainees, here's what I'm looking for:

someone who has solid design experience
someone who can take an idea to a project to completion
someone who is a problem solver and knows when he or she needs to ask for help.
someone who has no or very little design experience with FPGAs
someone who can commit to the 12-weeks of training and project building
someone who has a record of generous participation in the element14 community

What do You Think?

So, these are my ideas. We are thinking of launching enrollment sometime in July. If you have any questions, feel free to enter them in the comments area below.

rscasny · Answer

Good catch. I'll correct my description. They will receive the minized to do the exercises. But after that, we want the trainees to use the minized in a project. Randall

Jan Cumps · Answer

From the intro, it seems that focus is on the ARM / CPU part of the device more than the FPGA fabric and FPGA development.. Does the training include FPGA design (Verilog or VHDL , and if yes, which one)?

rscasny · Answer

Hi Nico. Good catch. Kind of cloudy writing there. This training has been presented in a live, classroom environment. It has only been offered (I think in the last year) as online training. When it is offered in a live session, each module -- one for hardware and the other for software -- is 8 hours of classroom instruction. For a total of 16 hours. But for this project, the attendees will not have to go to an online portal for the training. Rather, I will send the training videos and lab exercises to the trainees as zip files. They'll have to download. Randall

rsc · Answer

Sounds like an interesting way to tackle the problem. This part doesn't make sense to me - " After the training, the five trainees will be given a Minized development board" How can they do hands-on experiments without having the board before/during the training? Scott

jc2048 · Answer

From the syllabus, I'd say no. As I read it, the course is to learn the tools - the compiler tool-set side for the ARM and an embedded-module tool for piecing-together peripherals and other IP blocks on the hardware side. I should think some basic ARM programming and some FPGA design would actually be a pre-requisite, though I might be wrong. FPGA design experience might, though, be optional if people can manage with buying in IP blocks or working with the free Xilinx ones (which people working with largely processor-intensive stuff might be happy with).

ntewinkel · Answer

Hi Randall, This sounds very tempting, and will definitely be a big bonus to the selected 5. Could you clarify required commitment? > In a classroom situation, each module is 8 hours of live training. Does that mean there will be live 8-hour sessions to attend? Or is this all via videos of previously recorded classroom sessions? And how many modules are there? one per week for 12 weeks? Thanks, -Nico

rscasny · Answer

We will probably give all of them. So, it's like self-paced training

Workshopshed · Answer

> We are thinking of launching enrollment sometime in July.

dhmarinov · Answer

Hey there, that's a nice initiative. Perhaps if you need some support with the project I can give you a hand.