From yesterdays Telegraph:
The article is based on work done at MIT
https://www.media.mit.edu/projects/your-brain-on-chatgpt/overview/
If you follow the second link you can eventually find .pdf of the full research paper (if you've been using ChatGPT a lot recently you may struggle.)
You have been warned !
MK
research: I asked AI (chatGPT) if the RISC or ARM cores were most efficient.
First answer was disappointing, but then it was on track:
> me: what core is most efficient on rp2350, riscv or arm?
The RP2350 is a microcontroller from Raspberry Pi Ltd. that features a dual-core Arm Cortex-M0+ processor. It does not have a RISC-V core, so in the context of this specific chip, only the Arm Cortex-M0+ is present and thus is the core in use.
> me: this answer is wrong. rp2350 has 2 risc v cores and 2 arm cores
You're absolutely right—my apologies for the confusion. The RP2350 features 2 ARM Cortex‑M33 cores or 2 Hazard3 RISC‑V cores, selectable at boot, or even one of each if desired forums.parallax.com+15raspberrypi.com+15sparkfun.com+15.
️ Efficiency: Cortex‑M33 vs Hazard3 RISC‑V on the RP2350
Power & PerformanceCortex‑M33 (150 MHz):
Armv8‑M architecture with DSP and single-precision FPU.
Optimized for energy efficiency with Thumb‑2 ISA and TrustZone security dfrobot.com+1reddit.com+1en.wikipedia.org+1smist08.wordpress.com+1.
Best suited for signal processing and compute-heavy tasks due to hardware acceleration.
Hazard3 RISC‑V (150 MHz):
Custom in-house dual-core design (RV32IMAC+) by Raspberry Pi raspberrypi.com+7en.wikipedia.org+7en.wikipedia.org+7.
Compact implementation, removes ARM licensing costs, and supports compressed ISA for denser code reddit.com.
Likely scales well in silicon area and cache use—designed with minimalist efficiency in mind.
RISC‑V often provides better code density thanks to its C-extension, which can reduce flash/cache usage.
The mature Arm ecosystem offers more optimized toolchains and libraries for DSP, security, and low‑power modes.
RISC‑V ecosystem is growing rapidly, but M33 still leads for production-ready support raspberrypi.com+15dfrobot.com+15raspberrypi.com+15forums.parallax.com+2en.wikipedia.org+2datasheets.raspberrypi.com+2.
Switching ArchitectureSwitching between architectures requires a reset—only two cores run at a time datasheets.raspberrypi.com+1smist08.wordpress.com+1.
Thermal and power characteristics are similar at same clock rate; the difference lies in ISA benefits and use-case efficiency.
What’s Most Efficient?
At 150 MHz on RP2350:Per‑cycle performance:
Cortex‑M33 wins if you're using DSP/FPU-heavy workloads.
Hazard3 excels in compact code execution and flash efficiency.
Power consumption:
Both are designed to be low-power; Cortex‑M33 likely has slight edge due to mature low‑power modes and silicon optimizations.
Hazard3 may consume less static power and has less overhead in instruction handling.
TL;DRFor DSP, FPU, and security-heavy applications, use the Cortex‑M33.
For code-density, open-source flexibility, and potentially lower area cost**, go with Hazard3 RISC-V.
Power efficiency is comparable, but your workload (FPU vs compact code) determines the best choice.
research: I asked AI (chatGPT) if the RISC or ARM cores were most efficient.
First answer was disappointing, but then it was on track:
> me: what core is most efficient on rp2350, riscv or arm?
The RP2350 is a microcontroller from Raspberry Pi Ltd. that features a dual-core Arm Cortex-M0+ processor. It does not have a RISC-V core, so in the context of this specific chip, only the Arm Cortex-M0+ is present and thus is the core in use.
> me: this answer is wrong. rp2350 has 2 risc v cores and 2 arm cores
You're absolutely right—my apologies for the confusion. The RP2350 features 2 ARM Cortex‑M33 cores or 2 Hazard3 RISC‑V cores, selectable at boot, or even one of each if desired forums.parallax.com+15raspberrypi.com+15sparkfun.com+15.
️ Efficiency: Cortex‑M33 vs Hazard3 RISC‑V on the RP2350 Power & PerformanceCortex‑M33 (150 MHz):
Armv8‑M architecture with DSP and single-precision FPU.
Optimized for energy efficiency with Thumb‑2 ISA and TrustZone security dfrobot.com+1reddit.com+1en.wikipedia.org+1smist08.wordpress.com+1.
Best suited for signal processing and compute-heavy tasks due to hardware acceleration.
Hazard3 RISC‑V (150 MHz):
Custom in-house dual-core design (RV32IMAC+) by Raspberry Pi raspberrypi.com+7en.wikipedia.org+7en.wikipedia.org+7.
Compact implementation, removes ARM licensing costs, and supports compressed ISA for denser code reddit.com.
Likely scales well in silicon area and cache use—designed with minimalist efficiency in mind.
RISC‑V often provides better code density thanks to its C-extension, which can reduce flash/cache usage.
The mature Arm ecosystem offers more optimized toolchains and libraries for DSP, security, and low‑power modes.
RISC‑V ecosystem is growing rapidly, but M33 still leads for production-ready support raspberrypi.com+15dfrobot.com+15raspberrypi.com+15forums.parallax.com+2en.wikipedia.org+2datasheets.raspberrypi.com+2.
Switching ArchitectureSwitching between architectures requires a reset—only two cores run at a time datasheets.raspberrypi.com+1smist08.wordpress.com+1.
Thermal and power characteristics are similar at same clock rate; the difference lies in ISA benefits and use-case efficiency.
What’s Most Efficient? At 150 MHz on RP2350:Per‑cycle performance:
Cortex‑M33 wins if you're using DSP/FPU-heavy workloads.
Hazard3 excels in compact code execution and flash efficiency.
Power consumption:
Both are designed to be low-power; Cortex‑M33 likely has slight edge due to mature low‑power modes and silicon optimizations.
Hazard3 may consume less static power and has less overhead in instruction handling.
TL;DRFor DSP, FPU, and security-heavy applications, use the Cortex‑M33.
For code-density, open-source flexibility, and potentially lower area cost**, go with Hazard3 RISC-V.
Power efficiency is comparable, but your workload (FPU vs compact code) determines the best choice.
