This endeavor began back in 2003 as an embedded FPGA debugging tool and has grown incrementally over the years. After I retired almost 6 years ago, I continued to expand its capability... partially to fulfill a desired purpose and secondly because it was so much fun. My purpose in this thread is to generate an interest in this design so it does not die with me. During the years leading up to my retirement it had increased usage to a high level of importance for me at work. An earlier version is still at work in a CCA test set. I am not a competitive individual, I just enjoy following my imagination. I promise this is not a self aggrandizing ploy... I just want share what I found incredibly useful. I hope some of you can find a useful tool in this creation. All questions are welcome and I will advance more information as well as the complete design if interest materializes.
