Now that I have completed the ALU I can move onto the data path and registers.
Here are some of my constraints;
- no tri-state buffers
- keep the number of registers to a minimum (less then five, an 8 bit register uses 64 transistors)
- use the ALU to increment the program-counter (PC)
- 8 bit address and data bus's
- accumulator-memory instruction set
The first thing to do is to identify the registers (reg). I will need a PC, accumulator (ACC), address reg (AR), instruction reg (IR), and a B reg to act as the second input of the ALU.
either the PC or the AR will feed the address bus. If you OR with zero you get whatever you OR'd with so the PC,AR, and ACC can feed into the top of the ALU and the B reg, zero, and one feed into the bottom (the one is for increments).
Convert this to a block diagram and you get this;
the problems start when you try to increment the PC (or any other reg). To do this you select the 1 on the bottom bus and the PC on the top bus then the ALU wrights to the bus and the PC reads but then... It oscillates! The solution is to make the PC and ACC edge-triggered but that doubles the size of these reg! so the other choice is to add a temporary reg on to the output of the ALU
like this;
That is 384 transistors in registers alone! But maybe I can use the B reg as the address reg and the second operand; saving on one register. But to do this I need to be able to wright a zero to the top bus also
which results in this;
Of course I can't use tri-state buffers so it must be converted to multiplexers (and add the carry reg and flags zero, and neg);
The bottom and top MUX's can be simplified for a example to select zero you can use eight transistors to pull the output low.
I am just waiting on more solder to arrive then I will begin construction. I am quit new to this so all comments and suggestions are very welcome.
Tim
Top Comments