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  • Author Author: jc2048
  • Date Created: 8 Sep 2021 12:35 PM Date Created
  • Views 2866 views
  • Likes 10 likes
  • Comments 9 comments
  • fpga clock
  • oscillator
  • cmos
  • xtal
  • jc2048
Related
Recommended

CMOS Crystal Oscillator

jc2048
jc2048
8 Sep 2021

Introduction

 

I'm currently looking at doing some digital audio stuff with an FPGA. Ideally, I need to be

working with a clock that's a multiple of one of the common audio sample rates (48kHz, 96kHz, or

192kHz). 12.288MHz would be a good choice, being a reasonably high multiple of all of those, but

it's an awkward value to generate using an FPGA's PLL: on my Lattice Brevia 2 board, with its XP2

FPGA and 50MHz oscillator, the closest I can get to 12.288MHz is out by 0.2%. The DAC part that

I'm using would work with that [the PCMxxx part that's doing the output conversion does more than

just a simple conversion and needs to be able to work out which sample rate is in use, but the

datasheet allows for 4%, so it would function ok], and if I were to base musical note frequencies

on it you wouldn't hear the difference, unless you had exceptionally good perfect pitch, but even

so I'd like to be working with 12.288MHz, so I'm going to need a crystal oscillator. I don't have

an oscillator, but I do have a couple of crystals of the right frequency, so this blog is about me

building a simple oscillator to drive the FPGA.

 

The Circuit

 

I found a really nice application note[1] from Fairchild that covers what I want to do and used

that as a guide. My design is loosly based on the circuits in the app note. I'm being quite sloppy

with all this - don't copy it for a product design. It's ok for one-off experiments with an FPGA,

though.

 

I don't have any 'HC04 inverters (that I can find), so I've based it on a couple of the NAND gates

in a 74HC4011.

 

Here's the circuit. I'm just guessing that the crystal might be cut for a load capacitance of

something like 30pF. So the load caps might have been better as 56pF, but I had some 68pF, so went

with those.

 

image

 

The Prototype

 

Here's what my prototype looked like on a plug-in breadboard

 

image

 

Fortunately, it started up and ran nicely.

 

Here it is on a 5V supply:

 

image

 

and here on 3.3V:

 

image

 

It's less symmetrical on 3.3V, though I don't suppose the FPGA would mind. The frequency is much

more accurate on 3.3V, though still a little high, so I'll go with that one since the FPGA IO is

also 3.3V. There's a little more jitter, but it looks to be less than half a ns (can't really tell

any better than that with my scope, anyway). If it were a problem, I could always give it to one

of the PLLs in the FPGA to clean up.

 

This is how it behaves when the power comes up.

 

image

 

It starts quickly enough, when the supply gets up to about 1.2V. The subsequent ramp up that you

see is simply the smoothing capacitor in the bench supply output charging.

 

That's enough of that. I'll add it to my Brevia 2 board prototype and see if I can generate some

waveforms with it.

 

References
[1] AN-340 Fairchild

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Top Comments

  • rsjawale24
    rsjawale24 over 3 years ago +3
    Nice design and modifications in the circuit. Also, this type of oscillator is called Pierce Crystal Oscillator.
  • jc2048
    jc2048 over 3 years ago in reply to rsjawale24 +2
    Thank you. Yes, good point, it was originally due to Pierce. The patent is interesting to look at (I assume this is 'fair use' as I'm only showing part of it and we are having a technical discussion).…
  • rsjawale24
    rsjawale24 over 3 years ago in reply to jc2048 +2
    Yes it seems the headphones are used as a detector for the oscillations. So the frequency must be in few kHz. This also reminds me of a very simple type of radio receiver circuit called as a crystal radio…
  • colporteur
    colporteur over 3 years ago

    Enjoyed the post JC. Took a few more sips of tea for my morning brain to start processing but the understanding came through in the end. Pat on the back man.

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  • phoenixcomm
    phoenixcomm over 3 years ago in reply to jc2048

    jc2048 nope brand new old stock

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  • jc2048
    jc2048 over 3 years ago in reply to Jan Cumps

    Yes, the left gate is being used as an amplifier. The 10M resistor does the biasing.

     

    I did wonder if it would work with the NAND gate, as these kind of circuits usually show an inverter, but it was fine with the unused input tied to the rail.

     

    Probably not a good idea to try making the FPGA do it.

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  • jc2048
    jc2048 over 3 years ago in reply to phoenixcomm

    Thanks Cris, very generous of you, but I've got plenty of old parts to experiment with.

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  • phoenixcomm
    phoenixcomm over 3 years ago

    jc2048    nice job!  If you want I have a bunch of xtals lying around. I will have to look for them. I would be glad to send some to you.

    ~~Cris

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