I'm designing a BoosterPack to evaluate GaN devices with the help of a microcontroller. This post documents the PCB layout, specific for significant currency and high switching frequency. |
The GaN Evaluation BoosterPack - Computer Controlled version of the Reference Design
The GaN BoosterPack that I'm designing is a close brother to TI's LMG5200 reference design. The power electronics part is - deliberate - identical to the reference.
The purpose of the circuit is to have an evaluation tool where you can check GaN FET behaviour under varying conditions.
So I left all GaN power related parts as-is, and replaced the input control logic.
The reference design uses RC circuits to generate the required input signals. The user controls frequency and duty cycle of that input circuit by providing an external PWM signal.
Other parameters, such as the deadband and the duty cycle ratio between different driver signals are preset. You can change them by modifying the discrete components on the reference design (read: desoldering and replacing SMD caps and/or resistors).
I'm modding the design so that it takes the deadband from an external source. In my case, that source is a Hercules LaunchPad that runs an SCPI interpreter and can be controlled by LabVIEW.
The Gerbers for the reference designs are available from TI's website. If you load all the Gerber files into KiCAD's Gerber viewer, here are the ones you have to activate to get a good look-and-feel of the design:
- 1 midlayer 1 G1 (upper midlayer)
- 2 bottom layer GBL
- 6 drill layer GD1
- 7 drill guideline GG1
- 23 interpanel GP1 (lower midlayer)
- 26 top layer GTL
- 3 bottom overlay GBO
- 27 top overlay GTO
| {gallery} TI Reference Design |
|---|
1 midlayer 1 G1 (upper midlayer) |
2 bottom layer GBL |
23 interpanel GP1 (lower midlayer) |
26 top layer GTL |
6 drill layer GD1 |
7 drill guideline GG1 |
3 bottom overlay GBO |
27 top overlay GTO |
Layer Stack Up |
The Layout Application Note
TI has an elaborate guide with 'Layout Considerations for LMG5200 GaN Power Stage'. This document contains theory and practice on how to layout 2 or 4 layer PCBs for this device.
This goes well together with the EVM kit that I'm copy-catting here. The PCB of the EVM is used as the practical realisation of the layout theories and guidelines.
That means that I have all that's needed for my work: explanation, a physical example (TI gave me an EVM) and the Gerber files. Over to KiCad and draw my own version...
In the next post I'll post the schematics and PCB layout - and the KiCAD sources.
(was planning to do that now, but I can't upload images to the blog since this afternoon...)