Formatting of VHDL in code box

Question

Is it possible to do anything about the way VHDL code appears when formatted as text in a code box? 
 What appears like this, in Lattice Diamond's code editor, all nicely formatted and with appropriate colour highlighting 
 
 ends up like this when pasted as text in a code box on element14 
 
 The 'code box', or whatever the technical name for it is, seems to strip all bar one whitespace character and leaves otherwise readable code a lumpen mass that's difficult to understand, even when you're the person who wrote it. 
 I know tabs are difficult, but even if I replace them with spaces the code box still messes it up.

cstanton · Accepted Answer

Hi jc2048 , 
 Thanks for reaching out to us about this issue with VHDL code formatting in the code box. I understand how frustrating it can be when the code formatting gets messed up and makes it difficult to read and understand. 
 To clarify, it sounds like the issue is that the code box is not preserving the tabbing and spacing of the code when it is pasted in. Is that correct? 
 I will have to raise this with the development team to see if there is anything we can do to improve the formatting of code in the code box. However, I can't promise any immediate solution for this. 
 On another note, we'll be moving to version 12.1.4 of Verint soon, and this may change the text editor and how it functions. This may also affect how the code box operates, so we'll have to wait and see. 
 Thanks for bringing this to our attention, and we appreciate your patience and understanding as we work to resolve this issue.

Formatting of VHDL in code box

Top Replies