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CC3000-Pmod

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Is there a reference design or example to get a CC3000-Pmod wi-fi adapter working on the Zedboard?  This adapter is made to be used with the Xilinx Spartan-6 FPGA LX9 MicroBoard.

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    Hi all,
    we are using the PMOD CC3000(TIWI) with an SP601 board under ISE/EDK 14.7. We have made the effort to port the ref design of the microboard LX9 to the SP601 board. The issue was onto the GPIO IRQ port mapping with the interrupt controller.
    Now we have the example of the web server page from the LX9 that is working with the SP601 board under 14.7 version.
    Actually, we are trying to use the pmod wifi module onto the zedboard using the XSPI_PS IP. It seems that we are closed to have it working but some delay mechanism seems to be the issue.
    Inside the code, there are multiple call to the function _delay_cycles but it is a simple for loop which wait a certain amount of time... And comments in the code do not help to understand the real timing pause that is exepected. According to the microblaze design that is working at 100 MHz and the ZYNQ at 666MHz the rules would be to wait 6 times more, but unfortunately, it is not working...
    Does some body have any detailed documentation onto the state machine of the CC3000(API) and the timing constraints associated?
    Regards,
    Julien

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  • 0

    Hi all,
    we are using the PMOD CC3000(TIWI) with an SP601 board under ISE/EDK 14.7. We have made the effort to port the ref design of the microboard LX9 to the SP601 board. The issue was onto the GPIO IRQ port mapping with the interrupt controller.
    Now we have the example of the web server page from the LX9 that is working with the SP601 board under 14.7 version.
    Actually, we are trying to use the pmod wifi module onto the zedboard using the XSPI_PS IP. It seems that we are closed to have it working but some delay mechanism seems to be the issue.
    Inside the code, there are multiple call to the function _delay_cycles but it is a simple for loop which wait a certain amount of time... And comments in the code do not help to understand the real timing pause that is exepected. According to the microblaze design that is working at 100 MHz and the ZYNQ at 666MHz the rules would be to wait 6 times more, but unfortunately, it is not working...
    Does some body have any detailed documentation onto the state machine of the CC3000(API) and the timing constraints associated?
    Regards,
    Julien

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