In order to use Xillinux and Xillybus to moniter registers through the linux command terminal with /dev/something what do I have to do on the FPGA side, I figure I need to add the Xillybus IP but each time I load the bit file with impact it shuts down the PS (Xillinux) side and the logo disappears. How can I load a design, (e.g. switch on --> led on is a common one) and have the terminal tell me the state of the switches? Any documentation on this or examples? I've read all of the xillinux documentation and it helped on the Xillinux side but nothing on the PL side or about creating a custom bit file and reading the registers defined in the HDL code used to create it. Thanks a ton!
